[PATCH] D40067: Update of sched numbers for some mmx version of AVX instructions on btver2

[Andrew V. Tischenko via Phabricator via llvm-commits]

avt77 created this revision.

The current sched model does not have proper numbers for many128-bit instructions. This patch is the first one which tries to fix this issue.


https://reviews.llvm.org/D40067

Files:
  lib/Target/X86/X86ScheduleBtVer2.td
  test/CodeGen/X86/mmx-schedule.ll
  test/CodeGen/X86/recip-fastmath.ll
  test/CodeGen/X86/recip-fastmath2.ll
  test/CodeGen/X86/sse-schedule.ll
  test/CodeGen/X86/sse2-schedule.ll

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