[PATCH] D40034: [DAGCombine] Enable more srl + load combines

[Sam Parker via Phabricator via llvm-commits]

samparker added a comment.

Hi Sjoerd,

Yes I agree, more tests would be good. I've added V6-M to test whether no unaligned accesses are permitted, but admittedly that is for only one of the test cases. So I will add some more tests for different byte positions and some more for no unaligned accesses.

Many thanks!
sam


https://reviews.llvm.org/D40034