[llvm] r318138 - AMDGPU: Fix test

[Galina Kistanova via llvm-commits]

Hello Matt,

Unfortunately, this does not seem to fix the test.

The following bots are keep failing on this:

http://lab.llvm.org:8011/builders/clang-lld-x86_64-2stage

http://lab.llvm.org:8011/builders/clang-with-lto-ubuntu

http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu

http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win



Are you about to commit a fix, or prefer reverting to have more time?

Feel free to let me know if you need intermediate files from any of those
bots.



Thanks


Galina



On Mon, Nov 13, 2017 at 10:40 PM, Matt Arsenault via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: arsenm
> Date: Mon Nov 13 22:40:00 2017
> New Revision: 318138
>
> URL: http://llvm.org/viewvc/llvm-project?rev=318138&view=rev
> Log:
> AMDGPU: Fix test
>
> Modified:
>     llvm/trunk/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
>
> Modified: llvm/trunk/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir?rev=
> 318138&r1=318137&r2=318138&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
> (original)
> +++ llvm/trunk/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir Mon
> Nov 13 22:40:00 2017
> @@ -1,4 +1,4 @@
> -# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -run-pass
> si-optimize-exec-masking -verify-machineinstrs %s
> +# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -run-pass
> si-optimize-exec-masking -verify-machineinstrs -o -  %s | FileCheck %s
>  --- |
>    define amdgpu_kernel void @undefined_physreg_sgpr_spill() #0 {
>      unreachable
> @@ -16,7 +16,7 @@
>  # copy + s_and_b64 was turned into saveexec, deleting the copy,
>  # leaving a spill of the undefined register.
>
> -# CHECK-LABEL: {{^}}name: undefined_physreg_sgpr_spill:
> +# CHECK-LABEL: name: undefined_physreg_sgpr_spill
>  # CHECK: %sgpr0_sgpr1 = COPY %exec, implicit-def %exec
>  # CHECK-NEXT: SI_SPILL_S64_SAVE %sgpr0_sgpr1,
>  # CHECK-NEXT: %sgpr2_sgpr3 = S_AND_B64 killed %sgpr0_sgpr1, killed %vcc,
> implicit-def dead %scc
> @@ -79,10 +79,7 @@ body:             |
>  ---
>
>  # Move spill to after future save instruction
> -# CHECK-LABEL: {{^}}name: undefined_physreg_sgpr_spill_reorder:
> -# CHECK: %sgpr0_sgpr1 = COPY %exec, implicit-def %exec
> -# CHECK: %exec = COPY killed %sgpr2_sgpr3
> -
> +# CHECK-LABEL: {{^}}name: undefined_physreg_sgpr_spill_reorder
>  # CHECK: %sgpr0_sgpr1 = COPY %exec, implicit-def %exec
>  # CHECK: %sgpr2_sgpr3 = S_AND_B64 %sgpr0_sgpr1, killed %vcc, implicit-def
> dead %scc
>  # CHECK: SI_SPILL_S64_SAVE killed %sgpr0_sgpr1, %stack.0, implicit %exec,
> implicit %sgpr8_sgpr9_sgpr10_sgpr11, implicit %sgpr13, implicit-def dead
> %m0 :: (store 8 into %stack.0, align 4)
>
>
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