[PATCH] D40021: [X86][Haswell]: Updating the scheduling information for the Haswell subtarget.

[Gadi Haber via Phabricator via llvm-commits]

gadi.haber created this revision.

Updated the scheduling information for the Haswell subtarget with the following changes:

1. Regrouped the instructions after adding appropriate load + store latencies.
2. Added scheduling for missing instructions such as the GATHER instrs.

The changes were made after revisiting the latencies impact of all memory uOps.


Repository:
  rL LLVM

https://reviews.llvm.org/D40021

Files:
  lib/Target/X86/X86SchedHaswell.td
  test/CodeGen/X86/aes-schedule.ll
  test/CodeGen/X86/avx-schedule.ll
  test/CodeGen/X86/avx2-schedule.ll
  test/CodeGen/X86/bmi-schedule.ll
  test/CodeGen/X86/bmi2-schedule.ll
  test/CodeGen/X86/f16c-schedule.ll
  test/CodeGen/X86/fma-schedule.ll
  test/CodeGen/X86/lea32-schedule.ll
  test/CodeGen/X86/lea64-schedule.ll
  test/CodeGen/X86/lzcnt-schedule.ll
  test/CodeGen/X86/mmx-schedule.ll
  test/CodeGen/X86/movbe-schedule.ll
  test/CodeGen/X86/mul-constant-i32.ll
  test/CodeGen/X86/mul-constant-i64.ll
  test/CodeGen/X86/popcnt-schedule.ll
  test/CodeGen/X86/recip-fastmath.ll
  test/CodeGen/X86/recip-fastmath2.ll
  test/CodeGen/X86/schedule-x86_32.ll
  test/CodeGen/X86/schedule-x86_64.ll
  test/CodeGen/X86/sha-schedule.ll
  test/CodeGen/X86/sse-schedule.ll
  test/CodeGen/X86/sse2-schedule.ll
  test/CodeGen/X86/sse3-schedule.ll
  test/CodeGen/X86/sse41-schedule.ll
  test/CodeGen/X86/sse42-schedule.ll
  test/CodeGen/X86/ssse3-schedule.ll

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