[PATCH] D39894: [AArch64][SVE] Asm: Report SVE parsing diagnostics only once

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 13 01:29:03 PST 2017


sdesmalen added a comment.

In https://reviews.llvm.org/D39894#922644, @rengolin wrote:

> Is the VEDataVectorRegister` to `SVERegister` change meaningful?


The change from 'tryParseSVEDataVectorRegister' to 'tryParseSVERegister' is there because when I applied this patch onto our downstream branch (to ensure this patch would work for our entire test set with more instructions than unpredicated add/sub), I found that tryParseSVEDataVectorRegister() and tryParsePredicateVectorRegister() were the practically same after backporting our changes to matchRegisterNameAlias() from the previous patch. tryParseSVERegister() will also handle Predicates when we extend matchRegisterNameAlias with SVE predicates in a later patch, similar to how we did it for data vectors and so there is no need for having the 'DataVector' part in the name.


https://reviews.llvm.org/D39894





More information about the llvm-commits mailing list