[llvm] r317645 - AMDGPU: Set correct sched model on v_mad_u64_u32

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 7 16:48:25 PST 2017


Author: arsenm
Date: Tue Nov  7 16:48:25 2017
New Revision: 317645

URL: http://llvm.org/viewvc/llvm-project?rev=317645&view=rev
Log:
AMDGPU: Set correct sched model on v_mad_u64_u32

Modified:
    llvm/trunk/lib/Target/AMDGPU/VOP3Instructions.td
    llvm/trunk/test/CodeGen/AMDGPU/mul.ll

Modified: llvm/trunk/lib/Target/AMDGPU/VOP3Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/VOP3Instructions.td?rev=317645&r1=317644&r2=317645&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/VOP3Instructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/VOP3Instructions.td Tue Nov  7 16:48:25 2017
@@ -399,8 +399,10 @@ def V_MQSAD_U32_U8 : VOP3Inst <"v_mqsad_
 } // End Constraints = "@earlyclobber $vdst"
 
 let isCommutable = 1 in {
+let SchedRW = [WriteDouble, WriteSALU] in {
 def V_MAD_U64_U32 : VOP3Inst <"v_mad_u64_u32", VOP3b_I64_I1_I32_I32_I64>;
 def V_MAD_I64_I32 : VOP3Inst <"v_mad_i64_i32", VOP3b_I64_I1_I32_I32_I64>;
+} // End SchedRW = [WriteDouble, WriteSALU]
 } // End isCommutable = 1
 
 } // End SubtargetPredicate = isCIVI

Modified: llvm/trunk/test/CodeGen/AMDGPU/mul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/mul.ll?rev=317645&r1=317644&r2=317645&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/mul.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/mul.ll Tue Nov  7 16:48:25 2017
@@ -227,10 +227,10 @@ endif:
 
 
 ; VI: s_mul_i32
-; VI: s_mul_i32
-; VI: v_mul_hi_u32
 ; VI: v_mul_hi_u32
 ; VI: v_mad_u64_u32
+; VI: s_mul_i32
+; VI: v_mul_hi_u32
 ; VI: v_mad_u64_u32
 ; VI: v_mad_u64_u32
 
@@ -254,7 +254,7 @@ define amdgpu_kernel void @s_mul_i128(i1
 ; GCN-DAG: v_mul_hi_u32
 ; GCN-DAG: v_mul_lo_i32
 ; GCN-DAG: v_mul_lo_i32
-; GCN: v_add_i32_e32
+; GCN-DAG: v_add_i32_e32
 
 ; SI-DAG: v_mul_hi_u32
 ; SI-DAG: v_mul_lo_i32
@@ -265,7 +265,7 @@ define amdgpu_kernel void @s_mul_i128(i1
 ; SI-DAG: v_mul_lo_i32
 ; SI-DAG: v_mul_lo_i32
 
-; VI: v_mad_u64_u32
+; VI-DAG: v_mad_u64_u32
 ; VI: v_mad_u64_u32
 ; VI: v_mad_u64_u32
 




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