[PATCH] D39725: Fix assertion when using a V constraint in inline asm.

Jacob Young via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 7 03:00:32 PST 2017


jacobly created this revision.
Herald added a subscriber: eraman.

Uses of Constraint_v are commented with not offsetable, but that describes the V constraint, not v which is related to vector registers on x86.  Because TargetLowering::getConstraintType gets the case correct, a V constraint triggers an assertion when TargetLowering::getInlineAsmMemConstraint returns Constraint_unknown.


https://reviews.llvm.org/D39725

Files:
  include/llvm/IR/InlineAsm.h
  lib/CodeGen/MachineInstr.cpp
  lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
  lib/Target/X86/X86ISelDAGToDAG.cpp
  lib/Target/X86/X86ISelLowering.h
  test/CodeGen/X86/inline-asm-V-constraint.ll


Index: test/CodeGen/X86/inline-asm-V-constraint.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/inline-asm-V-constraint.ll
@@ -0,0 +1,12 @@
+; RUN: llc -mtriple=x86_64-pc-linux-gnu < %s | FileCheck %s
+
+ at foobar = common global i32 0, align 4
+
+define void @zed() nounwind {
+entry:
+  call void asm "nop", "=*V,~{dirflag},~{fpsr},~{flags}"(i32* @foobar) nounwind
+  ret void
+}
+
+; CHECK: zed
+; CHECK: nop
Index: lib/Target/X86/X86ISelLowering.h
===================================================================
--- lib/Target/X86/X86ISelLowering.h
+++ lib/Target/X86/X86ISelLowering.h
@@ -858,8 +858,8 @@
         return InlineAsm::Constraint_i;
       else if (ConstraintCode == "o")
         return InlineAsm::Constraint_o;
-      else if (ConstraintCode == "v")
-        return InlineAsm::Constraint_v;
+      else if (ConstraintCode == "V")
+        return InlineAsm::Constraint_V;
       else if (ConstraintCode == "X")
         return InlineAsm::Constraint_X;
       return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
Index: lib/Target/X86/X86ISelDAGToDAG.cpp
===================================================================
--- lib/Target/X86/X86ISelDAGToDAG.cpp
+++ lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -3078,7 +3078,7 @@
     //        be an immediate and not a memory constraint.
     LLVM_FALLTHROUGH;
   case InlineAsm::Constraint_o: // offsetable        ??
-  case InlineAsm::Constraint_v: // not offsetable    ??
+  case InlineAsm::Constraint_V: // not offsetable    ??
   case InlineAsm::Constraint_m: // memory
   case InlineAsm::Constraint_X:
     if (!selectAddr(nullptr, Op, Op0, Op1, Op2, Op3, Op4))
Index: lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
===================================================================
--- lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
+++ lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
@@ -891,7 +891,7 @@
     return true;
   case InlineAsm::Constraint_i:
   case InlineAsm::Constraint_o: // Offsetable.
-  case InlineAsm::Constraint_v: // Not offsetable.
+  case InlineAsm::Constraint_V: // Not offsetable.
   case InlineAsm::Constraint_m: // Memory.
     if (SelectAddrFI(Inp, Res))
       OutOps.push_back(Res);
Index: lib/CodeGen/MachineInstr.cpp
===================================================================
--- lib/CodeGen/MachineInstr.cpp
+++ lib/CodeGen/MachineInstr.cpp
@@ -2029,7 +2029,7 @@
         case InlineAsm::Constraint_i:  OS << ":i"; break;
         case InlineAsm::Constraint_m:  OS << ":m"; break;
         case InlineAsm::Constraint_o:  OS << ":o"; break;
-        case InlineAsm::Constraint_v:  OS << ":v"; break;
+        case InlineAsm::Constraint_V:  OS << ":V"; break;
         case InlineAsm::Constraint_Q:  OS << ":Q"; break;
         case InlineAsm::Constraint_R:  OS << ":R"; break;
         case InlineAsm::Constraint_S:  OS << ":S"; break;
Index: include/llvm/IR/InlineAsm.h
===================================================================
--- include/llvm/IR/InlineAsm.h
+++ include/llvm/IR/InlineAsm.h
@@ -244,7 +244,7 @@
     Constraint_i,
     Constraint_m,
     Constraint_o,
-    Constraint_v,
+    Constraint_V,
     Constraint_Q,
     Constraint_R,
     Constraint_S,


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