[PATCH] D38128: Handle COPYs of physregs better (regalloc hints)

Jonas Paulsson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 7 00:46:38 PST 2017 

jonpa updated this revision to Diff 121843.
jonpa added a comment.

@Nemanja:

> Just looking at the number and placement of reg-reg moves for PowerPC seems fine. It doesn't seem like there are regressions but no huge reduction in the number of copies. However, since the diff is without context, it's hard to tell exactly what is going on in the test cases. I'll apply this patch to ToT and have a look at how things change before signing off on the PPC changes.

Sorry about forgetting the context - fixed.

@Tom:

> The AMDGPU tests look OK, but the CHECK lines for test/CodeGen/AMDGPU/sgpr-control-flow.ll should be updated like this: https://reviews.llvm.org/P8044

Thanks! sgpr-control-flow.ll updated, but there is also still the multilevel-break.ll failure. This is the only test that is failing even with this patch, and the reason for this is that I was not sure how to update it. We discussed this on Oct 11 here on Phabricator. Could you please take a look?

Test updates in need of review:

TODO:
CodeGen   : BPF Hexagon Mips PowerPC SPARC Thumb Thumb2 X86 XCore
DebugInfo : COFF X86

PARTIALLY DONE (still more tests in need of review):
 CodeGen :

- AArch64  :  win64_vararg.ll, arm64-aapcs.ll, func-argpassing.ll (Martin Storsjo) swifterror.ll: small regression, needs approval (Martin Storsjo)
- AMDGPU: (Tom Stellard) All reviewed, but multilevel-break.ll needs updating (fails with patch)

DONE:
 CodeGen :

- ARM (Eli Friedman)


https://reviews.llvm.org/D38128

Files:
  include/llvm/CodeGen/MachineRegisterInfo.h
  include/llvm/Target/TargetRegisterInfo.h
  lib/CodeGen/CalcSpillWeights.cpp
  lib/CodeGen/TargetRegisterInfo.cpp
  test/CodeGen/AArch64/arm64-aapcs.ll
  test/CodeGen/AArch64/func-argpassing.ll
  test/CodeGen/AArch64/swifterror.ll
  test/CodeGen/AArch64/win64_vararg.ll
  test/CodeGen/AMDGPU/callee-special-input-sgprs.ll
  test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.icmp.ll
  test/CodeGen/AMDGPU/ret.ll
  test/CodeGen/AMDGPU/sgpr-control-flow.ll
  test/CodeGen/ARM/longMAC.ll
  test/CodeGen/ARM/select_xform.ll
  test/CodeGen/ARM/ssp-data-layout.ll
  test/CodeGen/ARM/struct_byval_arm_t1_t2.ll
  test/CodeGen/ARM/swifterror.ll
  test/CodeGen/BPF/alu8.ll
  test/CodeGen/BPF/basictest.ll
  test/CodeGen/BPF/cmp.ll
  test/CodeGen/BPF/dwarfdump.ll
  test/CodeGen/BPF/intrinsics.ll
  test/CodeGen/BPF/objdump_intrinsics.ll
  test/CodeGen/BPF/sanity.ll
  test/CodeGen/BPF/shifts.ll
  test/CodeGen/Hexagon/mul64-sext.ll
  test/CodeGen/Hexagon/pred-absolute-store.ll
  test/CodeGen/Mips/Fast-ISel/sel1.ll
  test/CodeGen/Mips/analyzebranch.ll
  test/CodeGen/Mips/llvm-ir/select-dbl.ll
  test/CodeGen/Mips/llvm-ir/select-flt.ll
  test/CodeGen/Mips/o32_cc_byval.ll
  test/CodeGen/Mips/select.ll
  test/CodeGen/PowerPC/licm-tocReg.ll
  test/CodeGen/PowerPC/load-two-flts.ll
  test/CodeGen/PowerPC/ppc64-byval-align.ll
  test/CodeGen/PowerPC/select-i1-vs-i1.ll
  test/CodeGen/SPARC/32abi.ll
  test/CodeGen/SPARC/64abi.ll
  test/CodeGen/SPARC/64cond.ll
  test/CodeGen/SystemZ/call-03.ll
  test/CodeGen/SystemZ/swift-return.ll
  test/CodeGen/SystemZ/swifterror.ll
  test/CodeGen/Thumb/long.ll
  test/CodeGen/Thumb2/aapcs.ll
  test/CodeGen/Thumb2/thumb2-select_xform.ll
  test/CodeGen/X86/GlobalISel/add-scalar.ll
  test/CodeGen/X86/GlobalISel/and-scalar.ll
  test/CodeGen/X86/GlobalISel/binop.ll
  test/CodeGen/X86/GlobalISel/callingconv.ll
  test/CodeGen/X86/GlobalISel/ext-x86-64.ll
  test/CodeGen/X86/GlobalISel/ext.ll
  test/CodeGen/X86/GlobalISel/memop-scalar.ll
  test/CodeGen/X86/GlobalISel/mul-scalar.ll
  test/CodeGen/X86/GlobalISel/or-scalar.ll
  test/CodeGen/X86/GlobalISel/phi.ll
  test/CodeGen/X86/GlobalISel/sub-scalar.ll
  test/CodeGen/X86/GlobalISel/trunc.ll
  test/CodeGen/X86/GlobalISel/undef.ll
  test/CodeGen/X86/GlobalISel/xor-scalar.ll
  test/CodeGen/X86/add.ll
  test/CodeGen/X86/addcarry.ll
  test/CodeGen/X86/andimm8.ll
  test/CodeGen/X86/anyext.ll
  test/CodeGen/X86/apm.ll
  test/CodeGen/X86/atomic-eflags-reuse.ll
  test/CodeGen/X86/atomic128.ll
  test/CodeGen/X86/avg.ll
  test/CodeGen/X86/avx-intel-ocl.ll
  test/CodeGen/X86/avx-vinsertf128.ll
  test/CodeGen/X86/avx512-arith.ll
  test/CodeGen/X86/avx512-calling-conv.ll
  test/CodeGen/X86/avx512-insert-extract.ll
  test/CodeGen/X86/avx512-mask-op.ll
  test/CodeGen/X86/avx512-regcall-NoMask.ll
  test/CodeGen/X86/avx512-schedule.ll
  test/CodeGen/X86/avx512-select.ll
  test/CodeGen/X86/avx512bw-mask-op.ll
  test/CodeGen/X86/avx512dq-mask-op.ll
  test/CodeGen/X86/avx512vl-arith.ll
  test/CodeGen/X86/bigstructret.ll
  test/CodeGen/X86/bitcast-i256.ll
  test/CodeGen/X86/bitcast-int-to-vector-bool.ll
  test/CodeGen/X86/bitreverse.ll
  test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll
  test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
  test/CodeGen/X86/bmi.ll
  test/CodeGen/X86/bool-simplify.ll
  test/CodeGen/X86/bswap-rotate.ll
  test/CodeGen/X86/bswap-wide-int.ll
  test/CodeGen/X86/bswap_tree.ll
  test/CodeGen/X86/bswap_tree2.ll
  test/CodeGen/X86/bt.ll
  test/CodeGen/X86/bypass-slow-division-64.ll
  test/CodeGen/X86/cmov-into-branch.ll
  test/CodeGen/X86/cmov.ll
  test/CodeGen/X86/cmovcmov.ll
  test/CodeGen/X86/cmp.ll
  test/CodeGen/X86/combine-add.ll
  test/CodeGen/X86/conditional-indecrement.ll
  test/CodeGen/X86/divide-by-constant.ll
  test/CodeGen/X86/divrem.ll
  test/CodeGen/X86/divrem8_ext.ll
  test/CodeGen/X86/fast-isel-fold-mem.ll
  test/CodeGen/X86/fast-isel-select-cmov.ll
  test/CodeGen/X86/fast-isel-select-cmov2.ll
  test/CodeGen/X86/fast-isel-select-pseudo-cmov.ll
  test/CodeGen/X86/fast-isel-sext-zext.ll
  test/CodeGen/X86/fast-isel-shift.ll
  test/CodeGen/X86/fast-isel-store.ll
  test/CodeGen/X86/fixup-bw-copy.ll
  test/CodeGen/X86/fold-vector-sext-crash2.ll
  test/CodeGen/X86/ghc-cc64.ll
  test/CodeGen/X86/hipe-cc64.ll
  test/CodeGen/X86/iabs.ll
  test/CodeGen/X86/imul.ll
  test/CodeGen/X86/ipra-local-linkage.ll
  test/CodeGen/X86/legalize-shift-64.ll
  test/CodeGen/X86/legalize-shl-vec.ll
  test/CodeGen/X86/machine-combiner-int.ll
  test/CodeGen/X86/machine-cse.ll
  test/CodeGen/X86/mask-negated-bool.ll
  test/CodeGen/X86/misched-matmul.ll
  test/CodeGen/X86/mul-constant-i16.ll
  test/CodeGen/X86/mul-constant-i32.ll
  test/CodeGen/X86/mul-constant-i64.ll
  test/CodeGen/X86/mul-i1024.ll
  test/CodeGen/X86/mul-i256.ll
  test/CodeGen/X86/mul-i512.ll
  test/CodeGen/X86/mul128.ll
  test/CodeGen/X86/mul64.ll
  test/CodeGen/X86/mwaitx.ll
  test/CodeGen/X86/negate-i1.ll
  test/CodeGen/X86/negate-shift.ll
  test/CodeGen/X86/negate.ll
  test/CodeGen/X86/no-sse2-avg.ll
  test/CodeGen/X86/not-and-simplify.ll
  test/CodeGen/X86/palignr.ll
  test/CodeGen/X86/peep-setb.ll
  test/CodeGen/X86/pku.ll
  test/CodeGen/X86/pr12312.ll
  test/CodeGen/X86/pr15705.ll
  test/CodeGen/X86/pr15981.ll
  test/CodeGen/X86/pr23664.ll
  test/CodeGen/X86/pr28173.ll
  test/CodeGen/X86/pr34657.ll
  test/CodeGen/X86/replace-load-and-with-bzhi.ll
  test/CodeGen/X86/rot16.ll
  test/CodeGen/X86/rot64.ll
  test/CodeGen/X86/rotate.ll
  test/CodeGen/X86/rotate4.ll
  test/CodeGen/X86/sad.ll
  test/CodeGen/X86/sar_fold64.ll
  test/CodeGen/X86/select.ll
  test/CodeGen/X86/select_const.ll
  test/CodeGen/X86/setcc-logic.ll
  test/CodeGen/X86/sext-i1.ll
  test/CodeGen/X86/shift-and.ll
  test/CodeGen/X86/shift-bmi2.ll
  test/CodeGen/X86/shift-double-x86_64.ll
  test/CodeGen/X86/sret-implicit.ll
  test/CodeGen/X86/sse1.ll
  test/CodeGen/X86/sse3-schedule.ll
  test/CodeGen/X86/sse42-intrinsics-fast-isel-x86_64.ll
  test/CodeGen/X86/sse42-intrinsics-fast-isel.ll
  test/CodeGen/X86/sse42-intrinsics-x86_64.ll
  test/CodeGen/X86/sse42-schedule.ll
  test/CodeGen/X86/subcarry.ll
  test/CodeGen/X86/swift-return.ll
  test/CodeGen/X86/swifterror.ll
  test/CodeGen/X86/system-intrinsics-xsetbv.ll
  test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll
  test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
  test/CodeGen/X86/tbm_patterns.ll
  test/CodeGen/X86/twoaddr-lea.ll
  test/CodeGen/X86/umul-with-overflow.ll
  test/CodeGen/X86/urem-power-of-two.ll
  test/CodeGen/X86/use-add-flags.ll
  test/CodeGen/X86/vector-bitreverse.ll
  test/CodeGen/X86/vector-blend.ll
  test/CodeGen/X86/vector-compare-results.ll
  test/CodeGen/X86/vector-interleave.ll
  test/CodeGen/X86/vector-pcmp.ll
  test/CodeGen/X86/vector-rotate-128.ll
  test/CodeGen/X86/vector-shift-ashr-128.ll
  test/CodeGen/X86/vector-shift-lshr-128.ll
  test/CodeGen/X86/vector-shift-shl-128.ll
  test/CodeGen/X86/vector-shuffle-128-v2.ll
  test/CodeGen/X86/vector-shuffle-combining-sse4a.ll
  test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
  test/CodeGen/X86/vector-shuffle-combining.ll
  test/CodeGen/X86/vector-zext.ll
  test/CodeGen/X86/vectorcall.ll
  test/CodeGen/X86/vselect-minmax.ll
  test/CodeGen/X86/vselect.ll
  test/CodeGen/X86/widen_bitops-0.ll
  test/CodeGen/X86/widen_bitops-1.ll
  test/CodeGen/X86/widen_load-2.ll
  test/CodeGen/X86/widen_load-3.ll
  test/CodeGen/X86/win64_vararg.ll
  test/CodeGen/X86/x86-cmov-converter.ll
  test/CodeGen/X86/x86-shrink-wrapping.ll
  test/CodeGen/X86/xaluo.ll
  test/CodeGen/X86/xchg-nofold.ll
  test/CodeGen/X86/xmulo.ll
  test/CodeGen/XCore/byVal.ll
  test/DebugInfo/COFF/pieces.ll
  test/DebugInfo/X86/live-debug-values.ll
  test/DebugInfo/X86/live-debug-variables.ll
  test/DebugInfo/X86/pieces-3.ll

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