[llvm] r317087 - [SelectionDAG] computeKnownBits - use ashrInPlace on known bits of ISD::SRA input. NFCI.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 1 06:16:48 PDT 2017


Author: rksimon
Date: Wed Nov  1 06:16:48 2017
New Revision: 317087

URL: http://llvm.org/viewvc/llvm-project?rev=317087&view=rev
Log:
[SelectionDAG] computeKnownBits - use ashrInPlace on known bits of ISD::SRA input. NFCI.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=317087&r1=317086&r2=317087&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Nov  1 06:16:48 2017
@@ -2479,17 +2479,9 @@ void SelectionDAG::computeKnownBits(SDVa
   case ISD::SRA:
     if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
       computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1);
-      Known.Zero.lshrInPlace(*ShAmt);
-      Known.One.lshrInPlace(*ShAmt);
-      // If we know the value of the sign bit, then we know it is copied across
-      // the high bits by the shift amount.
-      APInt SignMask = APInt::getSignMask(BitWidth);
-      SignMask.lshrInPlace(*ShAmt);  // Adjust to where it is now in the mask.
-      if (Known.Zero.intersects(SignMask)) {
-        Known.Zero.setHighBits(ShAmt->getZExtValue());// New bits are known zero.
-      } else if (Known.One.intersects(SignMask)) {
-        Known.One.setHighBits(ShAmt->getZExtValue()); // New bits are known one.
-      }
+      // Sign extend known zero/one bit (else is unknown).
+      Known.Zero.ashrInPlace(*ShAmt);
+      Known.One.ashrInPlace(*ShAmt);
     }
     break;
   case ISD::SIGN_EXTEND_INREG: {




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