[PATCH] D39476: [X86][SSE] Truncate with PACKSS any input with sufficient sign-bits

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 31 14:15:22 PDT 2017


RKSimon created this revision.

So far we've only been using PACKSS truncations with 'all-bits or zero-bits' patterns (vector comparison results etc.). When really we can safely use it for any case as long as the number of sign bits reach down to the last 16-bits (or 8-bits if we're truncating to bytes).

The next steps after this is add the equivalent support for PACKUS and to support packing to sub-128 bit vectors for truncating stores etc.


Repository:
  rL LLVM

https://reviews.llvm.org/D39476

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/avg.ll
  test/CodeGen/X86/avx2-shift.ll
  test/CodeGen/X86/avx2-vector-shifts.ll
  test/CodeGen/X86/vector-shift-ashr-128.ll
  test/CodeGen/X86/vector-trunc.ll

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