[PATCH] D39292: [X86][AVX512] Adding new patterns for extract_subvector of vXi1

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 26 13:59:23 PDT 2017


craig.topper added a comment.

Unless I'm mistaken, KSHIFTRB is only legal with AVX512DQ but that doesn't seem to be accounted for here.



================
Comment at: lib/Target/X86/X86InstrAVX512.td:2944
+	def : Pat<(To.KVT (extract_subvector (From.KVT From.KRC:$src), (iPTR imm:$imm8))),
+                  (To.KVT (COPY_TO_REGCLASS (!cast<Instruction>(InstrStr) From.KVT:$src, (i8 imm:$imm8)), To.KRC))>;
+
----------------
Please fix the indentation here. And I suspect this overflows 80 columns.


================
Comment at: lib/Target/X86/X86InstrAVX512.td:2951
+	def : Pat<(To.KVT (extract_subvector (From.KVT From.KRC:$src), (iPTR imm:$imm8))),
+                  (To.KVT (COPY_TO_REGCLASS (KSHIFTRBri (COPY_TO_REGCLASS From.KRC:$src, VK8), (i8 imm:$imm8)), To.KRC))>;
+}
----------------
fix indentation and 80 columns.


================
Comment at: lib/Target/X86/X86InstrAVX512.td:2981
                    VK2))>;
 def : Pat<(v4i1 (extract_subvector (v8i1 VK8:$src), (iPTR 4))),
           (v4i1 (COPY_TO_REGCLASS
----------------
How is this different than line 2965?


https://reviews.llvm.org/D39292





More information about the llvm-commits mailing list