[llvm] r316421 - [ARM] tSETEND needs IsThumb

[Oliver Stannard via llvm-commits]

Author: olista01
Date: Tue Oct 24 02:03:33 2017
New Revision: 316421

URL: http://llvm.org/viewvc/llvm-project?rev=316421&view=rev
Log:
[ARM] tSETEND needs IsThumb

This is the Thumb encoding, so the Requires list must include IsThumb.

No test because we happen to select the ARM one first, but that's just luck.

Differential Revision: https://reviews.llvm.org/D39190


Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=316421&r1=316420&r2=316421&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Tue Oct 24 02:03:33 2017
@@ -338,7 +338,7 @@ def tHLT : T1I<(outs), (ins imm0_63:$val
 }
 
 def tSETEND : T1I<(outs), (ins setend_op:$end), NoItinerary, "setend\t$end",
-                  []>, T1Encoding<0b101101>, Requires<[IsNotMClass]>, Deprecated<HasV8Ops> {
+                  []>, T1Encoding<0b101101>, Requires<[IsThumb, IsNotMClass]>, Deprecated<HasV8Ops> {
   bits<1> end;
   // A8.6.156
   let Inst{9-5} = 0b10010;