[PATCH] D39026: [NVPTX] allow address space inference for volatile loads/stores.

[Justin Lebar via Phabricator via llvm-commits]

jlebar accepted this revision.
jlebar added inline comments.
This revision is now accepted and ready to land.


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Comment at: llvm/include/llvm/Analysis/TargetTransformInfo.h:493
+  /// Return true if the given instruction (assumed to be a memory access
+  /// instruction) has volatile variant. If that's the case then we can avoid
+  /// addrspacecast to generic AS for volatile loads/stores. Default
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a volatile variant


https://reviews.llvm.org/D39026