[PATCH] D39190: [ARM] tSETEND needs IsThumb

Oliver Stannard via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 23 14:24:07 PDT 2017


olista01 added a comment.

It's _not_ OK to select the Thumb version of this instruction in ARM mode, and that's what this patch is preventing. Normally, the T1I base class sets the Predicates list to [IsThumb], but the Requires class overrides the whole list rather than appending to it, so we need to explicitly include IsThumb in the list here. The ARM version of this instruction does have IsARM in the Predicates list, so doesn't get selected for Thumb targets.

We just happen to not hit this bug at the moment because the ARM version of the instruction appears before this one in the matcher table, but that isn't actually guaranteed by anything, and other patches that I'm working on cause the order to be reversed.


Repository:
  rL LLVM

https://reviews.llvm.org/D39190





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