[llvm] r316296 - Strip trailing whitespace. NFCI.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sun Oct 22 11:38:58 PDT 2017


Author: rksimon
Date: Sun Oct 22 11:38:57 2017
New Revision: 316296

URL: http://llvm.org/viewvc/llvm-project?rev=316296&view=rev
Log:
Strip trailing whitespace. NFCI.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrAVX512.td

Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=316296&r1=316295&r2=316296&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Sun Oct 22 11:38:57 2017
@@ -1222,7 +1222,7 @@ multiclass avx512_int_broadcast_reg<bits
                          (_.VT (OpNode SrcRC:$src))>, T8PD, EVEX;
 }
 
-multiclass avx512_int_broadcastbw_reg<bits<8> opc, string Name, 
+multiclass avx512_int_broadcastbw_reg<bits<8> opc, string Name,
                                     X86VectorVTInfo _, SDPatternOperator OpNode,
                                     RegisterClass SrcRC, SubRegIndex Subreg> {
   let hasSideEffects = 0, ExeDomain = _.ExeDomain in
@@ -1250,7 +1250,7 @@ multiclass avx512_int_broadcastbw_reg_vl
                       AVX512VLVectorVTInfo _, SDPatternOperator OpNode,
                       RegisterClass SrcRC, SubRegIndex Subreg, Predicate prd> {
   let Predicates = [prd] in
-    defm Z : avx512_int_broadcastbw_reg<opc, Name#Z, _.info512, OpNode, SrcRC, 
+    defm Z : avx512_int_broadcastbw_reg<opc, Name#Z, _.info512, OpNode, SrcRC,
               Subreg>, EVEX_V512;
   let Predicates = [prd, HasVLX] in {
     defm Z256 : avx512_int_broadcastbw_reg<opc, Name#Z256, _.info256, OpNode,




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