[llvm] r316276 - Reverting r316270 due to failing build bots.

[Aaron Ballman via llvm-commits]

Author: aaronballman
Date: Sat Oct 21 13:38:15 2017
New Revision: 316276

URL: http://llvm.org/viewvc/llvm-project?rev=316276&view=rev
Log:
Reverting r316270 due to failing build bots.

http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules-2/builds/12899
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/7951

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
    llvm/trunk/test/CodeGen/PowerPC/testBitReverse.ll

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=316276&r1=316275&r2=316276&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Sat Oct 21 13:38:15 2017
@@ -4668,7 +4668,7 @@ def DWLo32RotateInsertByte1 {
 }
 
 def ExtendLo32 {
-  dag ToLo32 =
+  dag To64Bit =
     (i64 (INSERT_SUBREG (i64 (IMPLICIT_DEF)),
           DWLo32RotateInsertByte1.Left, sub_32));
 }
@@ -4695,17 +4695,15 @@ def DWHi32RotateInsertByte1 {
     (RLWIMI DWHi32RotateInsertByte3.Left, DWExtractHi32.SubReg, 8, 24, 31);
 }
 
-def MoveHi32 {
-  dag ToLo32 =
+def ExtendHi32 {
+  dag To64Bit =
     (i64 (INSERT_SUBREG (i64 (IMPLICIT_DEF)),
           DWHi32RotateInsertByte1.Left, sub_32));
 }
 
-// Now byte-swap within the high word and low word both are done, next
-// swap the high word and low word.
-def DWShiftLo32 { // SLDI ExtendLo32.ToLo32, 32
-  dag ToHi32 = (RLDICR ExtendLo32.ToLo32, 32, 31);
+def DWShiftLo32 { // SLDI ExtendHi32.To64Bit, 32
+  dag ToHi32 = (RLDICR ExtendHi32.To64Bit, 32, 31);
 }
 
 def : Pat<(i64 (bitreverse i64:$A)),
-  (OR8 DWShiftLo32.ToHi32, MoveHi32.ToLo32)>;
+  (OR8 DWShiftLo32.ToHi32, ExtendLo32.To64Bit)>;

Modified: llvm/trunk/test/CodeGen/PowerPC/testBitReverse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/testBitReverse.ll?rev=316276&r1=316275&r2=316276&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/testBitReverse.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/testBitReverse.ll Sat Oct 21 13:38:15 2017
@@ -67,38 +67,38 @@ define i64 @testBitReverseIntrinsicI64(i
 ; CHECK-NEXT:    and 4, 8, 4
 ; CHECK-NEXT:    lis 7, 3855
 ; CHECK-NEXT:    or 3, 3, 4
-; CHECK-NEXT:    oris 9, 5, 52428
-; CHECK-NEXT:    oris 10, 6, 13107
+; CHECK-NEXT:    oris 12, 5, 52428
+; CHECK-NEXT:    oris 9, 6, 13107
 ; CHECK-NEXT:    lis 6, -3856
 ; CHECK-NEXT:    ori 7, 7, 3855
 ; CHECK-NEXT:    sldi 8, 3, 2
-; CHECK-NEXT:    ori 4, 9, 52428
+; CHECK-NEXT:    ori 4, 12, 52428
 ; CHECK-NEXT:    rldicl 3, 3, 62, 2
-; CHECK-NEXT:    ori 5, 10, 13107
+; CHECK-NEXT:    ori 5, 9, 13107
 ; CHECK-NEXT:    ori 6, 6, 61680
 ; CHECK-NEXT:    and 3, 3, 5
 ; CHECK-NEXT:    sldi 5, 6, 32
 ; CHECK-NEXT:    and 4, 8, 4
 ; CHECK-NEXT:    sldi 6, 7, 32
 ; CHECK-NEXT:    or 3, 3, 4
-; CHECK-NEXT:    oris 11, 5, 61680
-; CHECK-NEXT:    oris 12, 6, 3855
+; CHECK-NEXT:    oris 10, 5, 61680
+; CHECK-NEXT:    oris 11, 6, 3855
 ; CHECK-NEXT:    sldi 6, 3, 4
-; CHECK-NEXT:    ori 4, 11, 61680
+; CHECK-NEXT:    ori 4, 10, 61680
 ; CHECK-NEXT:    rldicl 3, 3, 60, 4
-; CHECK-NEXT:    ori 5, 12, 3855
+; CHECK-NEXT:    ori 5, 11, 3855
 ; CHECK-NEXT:    and 4, 6, 4
 ; CHECK-NEXT:    and 3, 3, 5
 ; CHECK-NEXT:    or 3, 3, 4
-; CHECK-NEXT:    rlwinm 5, 3, 24, 0, 31
 ; CHECK-NEXT:    rldicl 4, 3, 32, 32
-; CHECK-NEXT:    rlwinm 6, 4, 24, 0, 31
-; CHECK-NEXT:    rlwimi 5, 3, 8, 8, 15
-; CHECK-NEXT:    rlwimi 6, 4, 8, 8, 15
-; CHECK-NEXT:    rlwimi 5, 3, 8, 24, 31
-; CHECK-NEXT:    rlwimi 6, 4, 8, 24, 31
-; CHECK-NEXT:    sldi 3, 5, 32
-; CHECK-NEXT:    or 3, 3, 6
+; CHECK-NEXT:    rlwinm 6, 3, 24, 0, 31
+; CHECK-NEXT:    rlwinm 5, 4, 24, 0, 31
+; CHECK-NEXT:    rlwimi 6, 3, 8, 8, 15
+; CHECK-NEXT:    rlwimi 5, 4, 8, 8, 15
+; CHECK-NEXT:    rlwimi 6, 3, 8, 24, 31
+; CHECK-NEXT:    rlwimi 5, 4, 8, 24, 31
+; CHECK-NEXT:    sldi 12, 5, 32
+; CHECK-NEXT:    or 3, 12, 6
 ; CHECK-NEXT:    blr
   %res = call i64 @llvm.bitreverse.i64(i64 %arg)
   ret i64 %res