[PATCH] D29934: [RISCV 12/n] Codegen support for memory operations

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 20 15:57:58 PDT 2017


reames accepted this revision.
reames added a comment.
This revision is now accepted and ready to land.

LGTM

Thanks for splitting.  Tracking the pieces is now much easier.



================
Comment at: lib/Target/RISCV/RISCVInstrInfo.cpp:39
+                                 bool KillSource) const {
+  if (!RISCV::GPRRegClass.contains(DestinationRegister, SourceRegister)) {
+    llvm_unreachable("Impossible reg-to-reg copy");
----------------
This looks like it can just be an assert.


https://reviews.llvm.org/D29934





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