[llvm] r316189 - [RISCV] Add missing hunk from r316188

[Alex Bradbury via llvm-commits]

Author: asb
Date: Thu Oct 19 14:43:29 2017
New Revision: 316189

URL: http://llvm.org/viewvc/llvm-project?rev=316189&view=rev
Log:
[RISCV] Add missing hunk from r316188

r316188 didn't set guessInstructionProperties=1 as it should have done.

Modified:
    llvm/trunk/lib/Target/RISCV/RISCV.td

Modified: llvm/trunk/lib/Target/RISCV/RISCV.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCV.td?rev=316189&r1=316188&r2=316189&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCV.td (original)
+++ llvm/trunk/lib/Target/RISCV/RISCV.td Thu Oct 19 14:43:29 2017
@@ -40,7 +40,9 @@ def : ProcessorModel<"generic-rv64", NoS
 //===----------------------------------------------------------------------===//
 
 def RISCVInstrInfo : InstrInfo {
-  let guessInstructionProperties = 0;
+  // TODO: disable guessInstructionProperties when
+  // https://reviews.llvm.org/D37065 lands.
+  let guessInstructionProperties = 1;
 }
 
 def RISCVAsmParser : AsmParser {