[PATCH] D39108: [DAGCombine] Don't combine sext with extload if sextload is not supported and extload has multi users

[Guozhi Wei via Phabricator via llvm-commits]

Carrot created this revision.
Herald added subscribers: kristof.beyls, nemanjai, aemerson.

In function DAGCombiner::visitSIGN_EXTEND_INREG, sext can be combined with extload even if sextload is not supported by target,  then

- if sext is the only user of extload, there is no big difference, no harm no benefit.
- if extload has more than one user, the combined sextload may block extload from combining with other zext, causes extra zext instructions generated. As demonstrated by the attached test case.

This patch add the constraint that when sextload is not supported by target, sext can only be combined with extload if it is the only user of extload.


https://reviews.llvm.org/D39108

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/PowerPC/selectiondag-sextload.ll


Index: test/CodeGen/PowerPC/selectiondag-sextload.ll
===================================================================
--- test/CodeGen/PowerPC/selectiondag-sextload.ll
+++ test/CodeGen/PowerPC/selectiondag-sextload.ll
@@ -0,0 +1,23 @@
+; RUN: llc --mtriple=powerpc64le-linux-gnu < %s | FileCheck %s
+
+; It tests in function DAGCombiner::visitSIGN_EXTEND_INREG
+; signext will not be combined with extload, and causes extra zext.
+
+declare void @g(i32 signext)
+
+; CHECK-NOT: rlwinm
+define void @foo(i8* %p) {
+entry:
+  br label %while.body
+
+while.body:
+  %0 = load i8, i8* %p, align 1
+  %conv = zext i8 %0 to i32
+  %cmp = icmp sgt i8 %0, 0
+  br i1 %cmp, label %if.then, label %while.body
+
+if.then:
+  tail call void @g(i32 signext %conv)
+  br label %while.body
+}
+
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -8274,10 +8274,13 @@
   }
 
   // fold (sext_inreg (extload x)) -> (sextload x)
+  // If sextload is not supported by target, we can only do the combine when
+  // load has one use.
   if (ISD::isEXTLoad(N0.getNode()) &&
       ISD::isUNINDEXEDLoad(N0.getNode()) &&
       EVT == cast<LoadSDNode>(N0)->getMemoryVT() &&
-      ((!LegalOperations && !cast<LoadSDNode>(N0)->isVolatile()) ||
+      ((!LegalOperations && !cast<LoadSDNode>(N0)->isVolatile() &&
+        N0.hasOneUse()) ||
        TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, EVT))) {
     LoadSDNode *LN0 = cast<LoadSDNode>(N0);
     SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(N), VT,


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