[PATCH] D39101: [RISCV 11.5/n] Codegen support for materializing constants

[Simon Dardis via Phabricator via llvm-commits]

sdardis added inline comments.


================
Comment at: lib/Target/RISCV/RISCVInstrInfo.td:281
+def : Pat<(simm12:$imm), (ADDI X0, simm12:$imm)>;
+def : Pat<(simm32:$imm), (ADDI (LUI (HI20 imm:$imm)), (LO12Sext imm:$imm))>;
+
----------------
asb wrote:
> sdardis wrote:
> > You should add the LUI pattern for materializing constants where the lower 12 bits are all zeros,
> Agreed, thanks for the comment. I had someone who has been playing with this patchset do this and send me a patch + tests via email. In order to track code ownership properly (and get them introduced to the LLVM code review process), they will submit to phabricator. It would probably make sense to commit this patch with a `// TODO: add pattern for immediate with lower 12 bits all zeros`.
>  In order to track code ownership properly (and get them introduced to the LLVM code review process), they will submit to phabricator. It would probably make sense to commit this patch with a // TODO: add pattern for immediate with lower 12 bits all zeros.

Sounds reasonable.


https://reviews.llvm.org/D39101