[PATCH] D39100: [ARM] Use PostRA machine scheduler when FeatureUseMISched is set

Eugene Leviant via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 19 10:23:03 PDT 2017


evgeny777 created this revision.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

With https://reviews.llvm.org/D37055 and https://reviews.llvm.org/D35935 it becomes easier to enable machine scheduler for specific AArch32 CPU. However I still have to pass **-misched-postra**, otherwise old SD scheduler is used on post RA pass and quite ofthen this produces worse code compared to not having post RA scheduling at all. This patch fixes it.


Repository:
  rL LLVM

https://reviews.llvm.org/D39100

Files:
  lib/Target/ARM/ARMTargetMachine.cpp


Index: lib/Target/ARM/ARMTargetMachine.cpp
===================================================================
--- lib/Target/ARM/ARMTargetMachine.cpp
+++ lib/Target/ARM/ARMTargetMachine.cpp
@@ -310,7 +310,14 @@
 class ARMPassConfig : public TargetPassConfig {
 public:
   ARMPassConfig(ARMBaseTargetMachine &TM, PassManagerBase &PM)
-    : TargetPassConfig(TM, PM) {}
+      : TargetPassConfig(TM, PM) {
+    if (TM.getOptLevel() != CodeGenOpt::None) {
+      ARMGenSubtargetInfo STI(TM.getTargetTriple(), TM.getTargetCPU(),
+                              TM.getTargetFeatureString());
+      if (STI.hasFeature(ARM::FeatureUseMISched))
+        substitutePass(&PostRASchedulerID, &PostMachineSchedulerID);
+    }
+  }
 
   ARMBaseTargetMachine &getARMTargetMachine() const {
     return getTM<ARMBaseTargetMachine>();


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