[PATCH] D39060: AMDGPU: Lower buffer store and atomic intrinsics manually

Marek Olšák via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 18 09:49:51 PDT 2017


mareko created this revision.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, kzhuravl.

Without this, SIMemoryLegalizer inserts s_waitcnt vmcnt(0) before every
buffer store and atomic instruction.


https://reviews.llvm.org/D39060

Files:
  lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  lib/Target/AMDGPU/AMDGPUISelLowering.h
  lib/Target/AMDGPU/BUFInstructions.td
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIInstrInfo.td
  lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  test/CodeGen/AMDGPU/llvm.amdgcn.buffer.atomic.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.format.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll

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