[PATCH] D38691: Add anti- and output loop carried dependences in SwingScheduler
Brendon Cahoon via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 12 15:26:21 PDT 2017
bcahoon added a comment.
Hi Ning,
Just a couple of minor comments, but I think the change looks good. I tried your example, provided in an earlier version, but it doesn't have any output or anti dependences by the time it gets to the pipeliner. The load of a[i-1] gets optimized away. I used the following to compile it, so perhaps some other command-line options are needed?
clang -fno-unroll-loops -target hexagon -O2 example.c -o example.s -S
But, I did noticee that a lit test, test/CodeGen/Hexagon/vect/vect-v4i16.ll, fails with the patch due to extra output dependence edges. It contains a loop that is no longer pipelined. The code generation is different, so the checks in the test fail. I think it's fine, for this lit test to remove the checks:
; CHECK: memuh(r{{[0-9]+}}+#6)
; CHECK: combine(r{{[0-9]+}},r{{[0-9]+}})
and leave the check for the vaddh, which shows that the test is vectorized.
Thanks,
Brendon
================
Comment at: lib/CodeGen/MachinePipeliner.cpp:1026
/// Add a chain edge between a load and store if the store can be an
/// alias of the load on a subsequent iteration, i.e., a loop carried
----------------
Update the command to reflect the new functionality.
================
Comment at: lib/CodeGen/MachinePipeliner.cpp:1050
+ continue;
+ for (auto Load : I->second) {
+ if (isSuccOrder(Load, &SU))
----------------
Change the variable name, Load, since this can be either a load or store.
https://reviews.llvm.org/D38691
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