[PATCH] D37348: Implement custom lowering for ISD::CTTZ_ZERO_UNDEF and ISD::CTTZ.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: test/CodeGen/AMDGPU/cttz_zero_undef.ll:175-176
+; SI-NOSDWA-DAG: v_or_b32_e32
+; SI-SDWA-DAG: v_or_b32_sdwa
+; SI-SDWA-DAG: v_or_b32_sdwa
+; SI: v_or_b32_e32 [[VAL1:v[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}}
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Using 2 -DAGs with identical lines doesn't do anything. It will pass with only one


Repository:
  rL LLVM

https://reviews.llvm.org/D37348