[lld] r315525 - Define RelType to represent relocation types.
Rui Ueyama via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 11 15:49:24 PDT 2017
Author: ruiu
Date: Wed Oct 11 15:49:24 2017
New Revision: 315525
URL: http://llvm.org/viewvc/llvm-project?rev=315525&view=rev
Log:
Define RelType to represent relocation types.
We were using uint32_t as the type of relocation kind. It has a
readability issue because what Type really means in `uint32_t Type`
is not obvious. It could be a section type, a symbol type or a
relocation type.
Since we do not do any arithemetic operations on relocation types
(e.g. adding one to R_X86_64_PC32 doesn't make sense), it would be
more natural if they are represented as enums. Unfortunately, that
is not doable because relocation type definitions are spread into
multiple header files.
So I decided to use typedef. This still should be better than the
plain uint32_t because the intended type is now obvious.
Modified:
lld/trunk/ELF/Arch/AArch64.cpp
lld/trunk/ELF/Arch/AMDGPU.cpp
lld/trunk/ELF/Arch/ARM.cpp
lld/trunk/ELF/Arch/AVR.cpp
lld/trunk/ELF/Arch/Mips.cpp
lld/trunk/ELF/Arch/PPC.cpp
lld/trunk/ELF/Arch/PPC64.cpp
lld/trunk/ELF/Arch/SPARCV9.cpp
lld/trunk/ELF/Arch/X86.cpp
lld/trunk/ELF/Arch/X86_64.cpp
lld/trunk/ELF/InputSection.cpp
lld/trunk/ELF/Relocations.cpp
lld/trunk/ELF/Relocations.h
lld/trunk/ELF/Target.cpp
lld/trunk/ELF/Target.h
lld/trunk/ELF/Thunks.cpp
lld/trunk/ELF/Thunks.h
Modified: lld/trunk/ELF/Arch/AArch64.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/AArch64.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/AArch64.cpp (original)
+++ lld/trunk/ELF/Arch/AArch64.cpp Wed Oct 11 15:49:24 2017
@@ -32,20 +32,20 @@ namespace {
class AArch64 final : public TargetInfo {
public:
AArch64();
- RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
+ RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
const uint8_t *Loc) const override;
- bool isPicRel(uint32_t Type) const override;
+ bool isPicRel(RelType Type) const override;
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
void writePltHeader(uint8_t *Buf) const override;
void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
- bool usesOnlyLowPageBits(uint32_t Type) const override;
- void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+ bool usesOnlyLowPageBits(RelType Type) const override;
+ void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
RelExpr Expr) const override;
- void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+ void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
};
} // namespace
@@ -68,7 +68,7 @@ AArch64::AArch64() {
TcbSize = 16;
}
-RelExpr AArch64::getRelExpr(uint32_t Type, const SymbolBody &S,
+RelExpr AArch64::getRelExpr(RelType Type, const SymbolBody &S,
const InputFile &File, const uint8_t *Loc) const {
switch (Type) {
default:
@@ -107,7 +107,7 @@ RelExpr AArch64::getRelExpr(uint32_t Typ
}
}
-RelExpr AArch64::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+RelExpr AArch64::adjustRelaxExpr(RelType Type, const uint8_t *Data,
RelExpr Expr) const {
if (Expr == R_RELAX_TLS_GD_TO_IE) {
if (Type == R_AARCH64_TLSDESC_ADR_PAGE21)
@@ -117,7 +117,7 @@ RelExpr AArch64::adjustRelaxExpr(uint32_
return Expr;
}
-bool AArch64::usesOnlyLowPageBits(uint32_t Type) const {
+bool AArch64::usesOnlyLowPageBits(RelType Type) const {
switch (Type) {
default:
return false;
@@ -135,7 +135,7 @@ bool AArch64::usesOnlyLowPageBits(uint32
}
}
-bool AArch64::isPicRel(uint32_t Type) const {
+bool AArch64::isPicRel(RelType Type) const {
return Type == R_AARCH64_ABS32 || Type == R_AARCH64_ABS64;
}
@@ -202,7 +202,7 @@ static void or32AArch64Imm(uint8_t *L, u
or32le(L, (Imm & 0xFFF) << 10);
}
-void AArch64::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void AArch64::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
switch (Type) {
case R_AARCH64_ABS16:
case R_AARCH64_PREL16:
@@ -307,7 +307,7 @@ void AArch64::relocateOne(uint8_t *Loc,
}
}
-void AArch64::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void AArch64::relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
// TLSDESC Global-Dynamic relocation are in the form:
// adrp x0, :tlsdesc:v [R_AARCH64_TLSDESC_ADR_PAGE21]
// ldr x1, [x0, #:tlsdesc_lo12:v [R_AARCH64_TLSDESC_LD64_LO12]
@@ -337,7 +337,7 @@ void AArch64::relaxTlsGdToLe(uint8_t *Lo
}
}
-void AArch64::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void AArch64::relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const {
// TLSDESC Global-Dynamic relocation are in the form:
// adrp x0, :tlsdesc:v [R_AARCH64_TLSDESC_ADR_PAGE21]
// ldr x1, [x0, #:tlsdesc_lo12:v [R_AARCH64_TLSDESC_LD64_LO12]
@@ -368,7 +368,7 @@ void AArch64::relaxTlsGdToIe(uint8_t *Lo
}
}
-void AArch64::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void AArch64::relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
checkUInt<32>(Loc, Val, Type);
if (Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21) {
Modified: lld/trunk/ELF/Arch/AMDGPU.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/AMDGPU.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/AMDGPU.cpp (original)
+++ lld/trunk/ELF/Arch/AMDGPU.cpp Wed Oct 11 15:49:24 2017
@@ -25,8 +25,8 @@ namespace {
class AMDGPU final : public TargetInfo {
public:
AMDGPU();
- void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
+ void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
const uint8_t *Loc) const override;
};
} // namespace
@@ -37,7 +37,7 @@ AMDGPU::AMDGPU() {
GotEntrySize = 8;
}
-void AMDGPU::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void AMDGPU::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
switch (Type) {
case R_AMDGPU_ABS32:
case R_AMDGPU_GOTPCREL:
@@ -58,7 +58,7 @@ void AMDGPU::relocateOne(uint8_t *Loc, u
}
}
-RelExpr AMDGPU::getRelExpr(uint32_t Type, const SymbolBody &S,
+RelExpr AMDGPU::getRelExpr(RelType Type, const SymbolBody &S,
const InputFile &File, const uint8_t *Loc) const {
switch (Type) {
case R_AMDGPU_ABS32:
Modified: lld/trunk/ELF/Arch/ARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/ARM.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/ARM.cpp (original)
+++ lld/trunk/ELF/Arch/ARM.cpp Wed Oct 11 15:49:24 2017
@@ -26,11 +26,11 @@ namespace {
class ARM final : public TargetInfo {
public:
ARM();
- RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
+ RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
const uint8_t *Loc) const override;
- bool isPicRel(uint32_t Type) const override;
- uint32_t getDynRel(uint32_t Type) const override;
- int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
+ bool isPicRel(RelType Type) const override;
+ RelType getDynRel(RelType Type) const override;
+ int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const override;
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
void writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const override;
void writePltHeader(uint8_t *Buf) const override;
@@ -38,11 +38,10 @@ public:
int32_t Index, unsigned RelOff) const override;
void addPltSymbols(InputSectionBase *IS, uint64_t Off) const override;
void addPltHeaderSymbols(InputSectionBase *ISD) const override;
- bool needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
+ bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
const SymbolBody &S) const override;
- bool inBranchRange(uint32_t RelocType, uint64_t Src,
- uint64_t Dst) const override;
- void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+ bool inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const override;
+ void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
};
} // namespace
@@ -65,7 +64,7 @@ ARM::ARM() {
NeedsThunks = true;
}
-RelExpr ARM::getRelExpr(uint32_t Type, const SymbolBody &S,
+RelExpr ARM::getRelExpr(RelType Type, const SymbolBody &S,
const InputFile &File, const uint8_t *Loc) const {
switch (Type) {
default:
@@ -123,12 +122,12 @@ RelExpr ARM::getRelExpr(uint32_t Type, c
}
}
-bool ARM::isPicRel(uint32_t Type) const {
+bool ARM::isPicRel(RelType Type) const {
return (Type == R_ARM_TARGET1 && !Config->Target1Rel) ||
(Type == R_ARM_ABS32);
}
-uint32_t ARM::getDynRel(uint32_t Type) const {
+RelType ARM::getDynRel(RelType Type) const {
if (Type == R_ARM_TARGET1 && !Config->Target1Rel)
return R_ARM_ABS32;
if (Type == R_ARM_ABS32)
@@ -189,7 +188,7 @@ void ARM::addPltSymbols(InputSectionBase
addSyntheticLocal("$d", STT_NOTYPE, Off + 12, 0, IS);
}
-bool ARM::needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
+bool ARM::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
const SymbolBody &S) const {
// If S is an undefined weak symbol in an executable we don't need a Thunk.
// In a DSO calls to undefined symbols, including weak ones get PLT entries
@@ -199,7 +198,7 @@ bool ARM::needsThunk(RelExpr Expr, uint3
// A state change from ARM to Thumb and vice versa must go through an
// interworking thunk if the relocation type is not R_ARM_CALL or
// R_ARM_THM_CALL.
- switch (RelocType) {
+ switch (Type) {
case R_ARM_PC24:
case R_ARM_PLT32:
case R_ARM_JUMP24:
@@ -219,11 +218,11 @@ bool ARM::needsThunk(RelExpr Expr, uint3
return false;
}
-bool ARM::inBranchRange(uint32_t RelocType, uint64_t Src, uint64_t Dst) const {
+bool ARM::inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const {
uint64_t Range;
uint64_t InstrSize;
- switch (RelocType) {
+ switch (Type) {
case R_ARM_PC24:
case R_ARM_PLT32:
case R_ARM_JUMP24:
@@ -262,7 +261,7 @@ bool ARM::inBranchRange(uint32_t RelocTy
return Distance <= Range;
}
-void ARM::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void ARM::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
switch (Type) {
case R_ARM_ABS32:
case R_ARM_BASE_PREL:
@@ -399,7 +398,7 @@ void ARM::relocateOne(uint8_t *Loc, uint
}
}
-int64_t ARM::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
+int64_t ARM::getImplicitAddend(const uint8_t *Buf, RelType Type) const {
switch (Type) {
default:
return 0;
Modified: lld/trunk/ELF/Arch/AVR.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/AVR.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/AVR.cpp (original)
+++ lld/trunk/ELF/Arch/AVR.cpp Wed Oct 11 15:49:24 2017
@@ -43,13 +43,13 @@ using namespace lld::elf;
namespace {
class AVR final : public TargetInfo {
public:
- RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
+ RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
const uint8_t *Loc) const override;
- void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+ void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
};
} // namespace
-RelExpr AVR::getRelExpr(uint32_t Type, const SymbolBody &S,
+RelExpr AVR::getRelExpr(RelType Type, const SymbolBody &S,
const InputFile &File, const uint8_t *Loc) const {
switch (Type) {
case R_AVR_CALL:
@@ -60,7 +60,7 @@ RelExpr AVR::getRelExpr(uint32_t Type, c
}
}
-void AVR::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void AVR::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
switch (Type) {
case R_AVR_CALL: {
uint16_t Hi = Val >> 17;
Modified: lld/trunk/ELF/Arch/Mips.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/Mips.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/Mips.cpp (original)
+++ lld/trunk/ELF/Arch/Mips.cpp Wed Oct 11 15:49:24 2017
@@ -28,19 +28,19 @@ namespace {
template <class ELFT> class MIPS final : public TargetInfo {
public:
MIPS();
- RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
+ RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
const uint8_t *Loc) const override;
- int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
- bool isPicRel(uint32_t Type) const override;
- uint32_t getDynRel(uint32_t Type) const override;
+ int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const override;
+ bool isPicRel(RelType Type) const override;
+ RelType getDynRel(RelType Type) const override;
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
void writePltHeader(uint8_t *Buf) const override;
void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
- bool needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
+ bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
const SymbolBody &S) const override;
- void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- bool usesOnlyLowPageBits(uint32_t Type) const override;
+ void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ bool usesOnlyLowPageBits(RelType Type) const override;
};
} // namespace
@@ -70,7 +70,7 @@ template <class ELFT> MIPS<ELFT>::MIPS()
}
template <class ELFT>
-RelExpr MIPS<ELFT>::getRelExpr(uint32_t Type, const SymbolBody &S,
+RelExpr MIPS<ELFT>::getRelExpr(RelType Type, const SymbolBody &S,
const InputFile &File,
const uint8_t *Loc) const {
// See comment in the calculateMipsRelChain.
@@ -180,11 +180,11 @@ RelExpr MIPS<ELFT>::getRelExpr(uint32_t
}
}
-template <class ELFT> bool MIPS<ELFT>::isPicRel(uint32_t Type) const {
+template <class ELFT> bool MIPS<ELFT>::isPicRel(RelType Type) const {
return Type == R_MIPS_32 || Type == R_MIPS_64;
}
-template <class ELFT> uint32_t MIPS<ELFT>::getDynRel(uint32_t Type) const {
+template <class ELFT> RelType MIPS<ELFT>::getDynRel(RelType Type) const {
return RelativeRel;
}
@@ -327,7 +327,7 @@ void MIPS<ELFT>::writePlt(uint8_t *Buf,
}
template <class ELFT>
-bool MIPS<ELFT>::needsThunk(RelExpr Expr, uint32_t Type, const InputFile *File,
+bool MIPS<ELFT>::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
const SymbolBody &S) const {
// Any MIPS PIC code function is invoked with its address in register $t9.
// So if we have a branch instruction from non-PIC code to the PIC one
@@ -350,7 +350,7 @@ bool MIPS<ELFT>::needsThunk(RelExpr Expr
}
template <class ELFT>
-int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
+int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *Buf, RelType Type) const {
const endianness E = ELFT::TargetEndianness;
switch (Type) {
default:
@@ -421,7 +421,7 @@ int64_t MIPS<ELFT>::getImplicitAddend(co
}
static std::pair<uint32_t, uint64_t>
-calculateMipsRelChain(uint8_t *Loc, uint32_t Type, uint64_t Val) {
+calculateMipsRelChain(uint8_t *Loc, RelType Type, uint64_t Val) {
// MIPS N64 ABI packs multiple relocations into the single relocation
// record. In general, all up to three relocations can have arbitrary
// types. In fact, Clang and GCC uses only a few combinations. For now,
@@ -434,8 +434,8 @@ calculateMipsRelChain(uint8_t *Loc, uint
// relocations used to modify result of the first one: extend it to
// 64-bit, extract high or low part etc. For details, see part 2.9 Relocation
// at the https://dmz-portal.mips.com/mw/images/8/82/007-4658-001.pdf
- uint32_t Type2 = (Type >> 8) & 0xff;
- uint32_t Type3 = (Type >> 16) & 0xff;
+ RelType Type2 = (Type >> 8) & 0xff;
+ RelType Type3 = (Type >> 16) & 0xff;
if (Type2 == R_MIPS_NONE && Type3 == R_MIPS_NONE)
return std::make_pair(Type, Val);
if (Type2 == R_MIPS_64 && Type3 == R_MIPS_NONE)
@@ -451,7 +451,7 @@ calculateMipsRelChain(uint8_t *Loc, uint
}
template <class ELFT>
-void MIPS<ELFT>::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void MIPS<ELFT>::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
const endianness E = ELFT::TargetEndianness;
// Thread pointer and DRP offsets from the start of TLS data area.
// https://www.linux-mips.org/wiki/NPTL
@@ -632,8 +632,7 @@ void MIPS<ELFT>::relocateOne(uint8_t *Lo
}
}
-template <class ELFT>
-bool MIPS<ELFT>::usesOnlyLowPageBits(uint32_t Type) const {
+template <class ELFT> bool MIPS<ELFT>::usesOnlyLowPageBits(RelType Type) const {
return Type == R_MIPS_LO16 || Type == R_MIPS_GOT_OFST ||
Type == R_MICROMIPS_LO16 || Type == R_MICROMIPS_GOT_OFST;
}
Modified: lld/trunk/ELF/Arch/PPC.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/PPC.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/PPC.cpp (original)
+++ lld/trunk/ELF/Arch/PPC.cpp Wed Oct 11 15:49:24 2017
@@ -22,13 +22,13 @@ namespace {
class PPC final : public TargetInfo {
public:
PPC() { GotBaseSymOff = 0x8000; }
- void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
+ void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
const uint8_t *Loc) const override;
};
} // namespace
-void PPC::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void PPC::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
switch (Type) {
case R_PPC_ADDR16_HA:
write16be(Loc, (Val + 0x8000) >> 16);
@@ -48,7 +48,7 @@ void PPC::relocateOne(uint8_t *Loc, uint
}
}
-RelExpr PPC::getRelExpr(uint32_t Type, const SymbolBody &S,
+RelExpr PPC::getRelExpr(RelType Type, const SymbolBody &S,
const InputFile &File, const uint8_t *Loc) const {
switch (Type) {
case R_PPC_REL24:
Modified: lld/trunk/ELF/Arch/PPC64.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/PPC64.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/PPC64.cpp (original)
+++ lld/trunk/ELF/Arch/PPC64.cpp Wed Oct 11 15:49:24 2017
@@ -39,11 +39,11 @@ namespace {
class PPC64 final : public TargetInfo {
public:
PPC64();
- RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
+ RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
const uint8_t *Loc) const override;
void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
- void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+ void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
};
} // namespace
@@ -82,7 +82,7 @@ PPC64::PPC64() {
DefaultImageBase = 0x10000000;
}
-RelExpr PPC64::getRelExpr(uint32_t Type, const SymbolBody &S,
+RelExpr PPC64::getRelExpr(RelType Type, const SymbolBody &S,
const InputFile &File, const uint8_t *Loc) const {
switch (Type) {
default:
@@ -122,7 +122,7 @@ void PPC64::writePlt(uint8_t *Buf, uint6
write32be(Buf + 28, 0x4e800420); // bctr
}
-static std::pair<uint32_t, uint64_t> toAddr16Rel(uint32_t Type, uint64_t Val) {
+static std::pair<RelType, uint64_t> toAddr16Rel(RelType Type, uint64_t Val) {
uint64_t V = Val - PPC64TocOffset;
switch (Type) {
case R_PPC64_TOC16:
@@ -142,7 +142,7 @@ static std::pair<uint32_t, uint64_t> toA
}
}
-void PPC64::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void PPC64::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
// For a TOC-relative relocation, proceed in terms of the corresponding
// ADDR16 relocation type.
std::tie(Type, Val) = toAddr16Rel(Type, Val);
Modified: lld/trunk/ELF/Arch/SPARCV9.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/SPARCV9.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/SPARCV9.cpp (original)
+++ lld/trunk/ELF/Arch/SPARCV9.cpp Wed Oct 11 15:49:24 2017
@@ -24,11 +24,11 @@ namespace {
class SPARCV9 final : public TargetInfo {
public:
SPARCV9();
- RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
+ RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
const uint8_t *Loc) const override;
void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
- void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+ void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
};
} // namespace
@@ -46,7 +46,7 @@ SPARCV9::SPARCV9() {
DefaultImageBase = 0x100000;
}
-RelExpr SPARCV9::getRelExpr(uint32_t Type, const SymbolBody &S,
+RelExpr SPARCV9::getRelExpr(RelType Type, const SymbolBody &S,
const InputFile &File, const uint8_t *Loc) const {
switch (Type) {
case R_SPARC_32:
@@ -73,7 +73,7 @@ RelExpr SPARCV9::getRelExpr(uint32_t Typ
}
}
-void SPARCV9::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void SPARCV9::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
switch (Type) {
case R_SPARC_32:
case R_SPARC_UA32:
Modified: lld/trunk/ELF/Arch/X86.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/X86.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/X86.cpp (original)
+++ lld/trunk/ELF/Arch/X86.cpp Wed Oct 11 15:49:24 2017
@@ -24,24 +24,24 @@ namespace {
class X86 final : public TargetInfo {
public:
X86();
- RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
+ RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
const uint8_t *Loc) const override;
- int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
+ int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const override;
void writeGotPltHeader(uint8_t *Buf) const override;
- uint32_t getDynRel(uint32_t Type) const override;
+ RelType getDynRel(RelType Type) const override;
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
void writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const override;
void writePltHeader(uint8_t *Buf) const override;
void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
- void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+ void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
- RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+ RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
RelExpr Expr) const override;
- void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+ void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
};
} // namespace
@@ -63,7 +63,7 @@ X86::X86() {
TrapInstr = 0xcccccccc; // 0xcc = INT3
}
-RelExpr X86::getRelExpr(uint32_t Type, const SymbolBody &S,
+RelExpr X86::getRelExpr(RelType Type, const SymbolBody &S,
const InputFile &File, const uint8_t *Loc) const {
switch (Type) {
case R_386_8:
@@ -121,7 +121,7 @@ RelExpr X86::getRelExpr(uint32_t Type, c
}
}
-RelExpr X86::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+RelExpr X86::adjustRelaxExpr(RelType Type, const uint8_t *Data,
RelExpr Expr) const {
switch (Expr) {
default:
@@ -148,7 +148,7 @@ void X86::writeIgotPlt(uint8_t *Buf, con
write32le(Buf, S.getVA());
}
-uint32_t X86::getDynRel(uint32_t Type) const {
+RelType X86::getDynRel(RelType Type) const {
if (Type == R_386_TLS_LE)
return R_386_TLS_TPOFF;
if (Type == R_386_TLS_LE_32)
@@ -208,7 +208,7 @@ void X86::writePlt(uint8_t *Buf, uint64_
write32le(Buf + 12, -Index * PltEntrySize - PltHeaderSize - 16);
}
-int64_t X86::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
+int64_t X86::getImplicitAddend(const uint8_t *Buf, RelType Type) const {
switch (Type) {
default:
return 0;
@@ -231,7 +231,7 @@ int64_t X86::getImplicitAddend(const uin
}
}
-void X86::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void X86::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
// R_386_{PC,}{8,16} are not part of the i386 psABI, but they are
// being used for some 16-bit programs such as boot loaders, so
// we want to support them.
@@ -268,7 +268,7 @@ void X86::relocateOne(uint8_t *Loc, uint
}
}
-void X86::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void X86::relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
// Convert
// leal x at tlsgd(, %ebx, 1),
// call __tls_get_addr at plt
@@ -283,7 +283,7 @@ void X86::relaxTlsGdToLe(uint8_t *Loc, u
write32le(Loc + 5, Val);
}
-void X86::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void X86::relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const {
// Convert
// leal x at tlsgd(, %ebx, 1),
// call __tls_get_addr at plt
@@ -300,7 +300,7 @@ void X86::relaxTlsGdToIe(uint8_t *Loc, u
// In some conditions, relocations can be optimized to avoid using GOT.
// This function does that for Initial Exec to Local Exec case.
-void X86::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void X86::relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
// Ulrich's document section 6.2 says that @gotntpoff can
// be used with MOVL or ADDL instructions.
// @indntpoff is similar to @gotntpoff, but for use in
@@ -337,7 +337,7 @@ void X86::relaxTlsIeToLe(uint8_t *Loc, u
write32le(Loc, Val);
}
-void X86::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+void X86::relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
if (Type == R_386_TLS_LDO_32) {
write32le(Loc, Val);
return;
Modified: lld/trunk/ELF/Arch/X86_64.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/X86_64.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/X86_64.cpp (original)
+++ lld/trunk/ELF/Arch/X86_64.cpp Wed Oct 11 15:49:24 2017
@@ -26,23 +26,23 @@ namespace {
template <class ELFT> class X86_64 final : public TargetInfo {
public:
X86_64();
- RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
+ RelExpr getRelExpr(RelType Type, const SymbolBody &S, const InputFile &File,
const uint8_t *Loc) const override;
- bool isPicRel(uint32_t Type) const override;
+ bool isPicRel(RelType Type) const override;
void writeGotPltHeader(uint8_t *Buf) const override;
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
void writePltHeader(uint8_t *Buf) const override;
void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
- void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+ void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
- RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+ RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
RelExpr Expr) const override;
void relaxGot(uint8_t *Loc, uint64_t Val) const override;
- void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+ void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+ void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
private:
void relaxGotNoPic(uint8_t *Loc, uint64_t Val, uint8_t Op,
@@ -73,7 +73,7 @@ template <class ELFT> X86_64<ELFT>::X86_
}
template <class ELFT>
-RelExpr X86_64<ELFT>::getRelExpr(uint32_t Type, const SymbolBody &S,
+RelExpr X86_64<ELFT>::getRelExpr(RelType Type, const SymbolBody &S,
const InputFile &File,
const uint8_t *Loc) const {
switch (Type) {
@@ -158,13 +158,13 @@ void X86_64<ELFT>::writePlt(uint8_t *Buf
write32le(Buf + 12, -Index * PltEntrySize - PltHeaderSize - 16);
}
-template <class ELFT> bool X86_64<ELFT>::isPicRel(uint32_t Type) const {
+template <class ELFT> bool X86_64<ELFT>::isPicRel(RelType Type) const {
return Type != R_X86_64_PC32 && Type != R_X86_64_32 &&
Type != R_X86_64_TPOFF32;
}
template <class ELFT>
-void X86_64<ELFT>::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
+void X86_64<ELFT>::relaxTlsGdToLe(uint8_t *Loc, RelType Type,
uint64_t Val) const {
// Convert
// .byte 0x66
@@ -187,7 +187,7 @@ void X86_64<ELFT>::relaxTlsGdToLe(uint8_
}
template <class ELFT>
-void X86_64<ELFT>::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type,
+void X86_64<ELFT>::relaxTlsGdToIe(uint8_t *Loc, RelType Type,
uint64_t Val) const {
// Convert
// .byte 0x66
@@ -212,7 +212,7 @@ void X86_64<ELFT>::relaxTlsGdToIe(uint8_
// In some conditions, R_X86_64_GOTTPOFF relocation can be optimized to
// R_X86_64_TPOFF32 so that it does not use GOT.
template <class ELFT>
-void X86_64<ELFT>::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
+void X86_64<ELFT>::relaxTlsIeToLe(uint8_t *Loc, RelType Type,
uint64_t Val) const {
uint8_t *Inst = Loc - 3;
uint8_t Reg = Loc[-1] >> 3;
@@ -255,7 +255,7 @@ void X86_64<ELFT>::relaxTlsIeToLe(uint8_
}
template <class ELFT>
-void X86_64<ELFT>::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type,
+void X86_64<ELFT>::relaxTlsLdToLe(uint8_t *Loc, RelType Type,
uint64_t Val) const {
// Convert
// leaq bar at tlsld(%rip), %rdi
@@ -284,8 +284,7 @@ void X86_64<ELFT>::relaxTlsLdToLe(uint8_
}
template <class ELFT>
-void X86_64<ELFT>::relocateOne(uint8_t *Loc, uint32_t Type,
- uint64_t Val) const {
+void X86_64<ELFT>::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
switch (Type) {
case R_X86_64_8:
checkUInt<8>(Loc, Val, Type);
@@ -329,7 +328,7 @@ void X86_64<ELFT>::relocateOne(uint8_t *
}
template <class ELFT>
-RelExpr X86_64<ELFT>::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+RelExpr X86_64<ELFT>::adjustRelaxExpr(RelType Type, const uint8_t *Data,
RelExpr RelExpr) const {
if (Type != R_X86_64_GOTPCRELX && Type != R_X86_64_REX_GOTPCRELX)
return RelExpr;
Modified: lld/trunk/ELF/InputSection.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/InputSection.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/InputSection.cpp (original)
+++ lld/trunk/ELF/InputSection.cpp Wed Oct 11 15:49:24 2017
@@ -369,7 +369,7 @@ void InputSection::copyRelocations(uint8
InputSectionBase *Sec = getRelocatedSection();
for (const RelTy &Rel : Rels) {
- uint32_t Type = Rel.getType(Config->IsMips64EL);
+ RelType Type = Rel.getType(Config->IsMips64EL);
SymbolBody &Body = this->getFile<ELFT>()->getRelocTargetSym(Rel);
auto *P = reinterpret_cast<typename ELFT::Rela *>(Buf);
@@ -418,7 +418,7 @@ void InputSection::copyRelocations(uint8
// this context is the address of the place P. A further special case is that
// branch relocations to an undefined weak reference resolve to the next
// instruction.
-static uint32_t getARMUndefinedRelativeWeakVA(uint32_t Type, uint32_t A,
+static uint32_t getARMUndefinedRelativeWeakVA(RelType Type, uint32_t A,
uint32_t P) {
switch (Type) {
// Unresolved branch relocations to weak references resolve to next
@@ -485,7 +485,7 @@ static uint64_t getARMStaticBase(const S
return OS->PtLoad->FirstSec->Addr;
}
-static uint64_t getRelocTargetVA(uint32_t Type, int64_t A, uint64_t P,
+static uint64_t getRelocTargetVA(RelType Type, int64_t A, uint64_t P,
const SymbolBody &Body, RelExpr Expr) {
switch (Expr) {
case R_ABS:
@@ -653,7 +653,7 @@ void InputSection::relocateNonAlloc(uint
const unsigned Bits = sizeof(typename ELFT::uint) * 8;
for (const RelTy &Rel : Rels) {
- uint32_t Type = Rel.getType(Config->IsMips64EL);
+ RelType Type = Rel.getType(Config->IsMips64EL);
uint64_t Offset = getOffset(Rel.r_offset);
uint8_t *BufLoc = Buf + Offset;
int64_t Addend = getAddend<ELFT>(Rel);
@@ -698,7 +698,7 @@ void InputSectionBase::relocateAlloc(uin
for (const Relocation &Rel : Relocations) {
uint64_t Offset = getOffset(Rel.Offset);
uint8_t *BufLoc = Buf + Offset;
- uint32_t Type = Rel.Type;
+ RelType Type = Rel.Type;
uint64_t AddrLoc = getOutputSection()->Addr + Offset;
RelExpr Expr = Rel.Expr;
Modified: lld/trunk/ELF/Relocations.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Relocations.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Relocations.cpp (original)
+++ lld/trunk/ELF/Relocations.cpp Wed Oct 11 15:49:24 2017
@@ -80,7 +80,7 @@ static std::string getLocation(InputSect
return Msg + S.getObjMsg<ELFT>(Off);
}
-static bool isPreemptible(const SymbolBody &Body, uint32_t Type) {
+static bool isPreemptible(const SymbolBody &Body, RelType Type) {
// In case of MIPS GP-relative relocations always resolve to a definition
// in a regular input file, ignoring the one-definition rule. So we,
// for example, should not attempt to create a dynamic relocation even
@@ -107,7 +107,7 @@ static bool isPreemptible(const SymbolBo
// Mips has a custom MipsGotSection that handles the writing of GOT entries
// without dynamic relocations.
template <class ELFT>
-static unsigned handleMipsTlsRelocation(uint32_t Type, SymbolBody &Body,
+static unsigned handleMipsTlsRelocation(RelType Type, SymbolBody &Body,
InputSectionBase &C, uint64_t Offset,
int64_t Addend, RelExpr Expr) {
if (Expr == R_MIPS_TLSLD) {
@@ -149,7 +149,7 @@ static unsigned handleMipsTlsRelocation(
// GOT[e0] Module Index (Used to find pointer to TLS block at run-time)
// GOT[e1] Offset of symbol in TLS block
template <class ELFT>
-static unsigned handleARMTlsRelocation(uint32_t Type, SymbolBody &Body,
+static unsigned handleARMTlsRelocation(RelType Type, SymbolBody &Body,
InputSectionBase &C, uint64_t Offset,
int64_t Addend, RelExpr Expr) {
// The Dynamic TLS Module Index Relocation for a symbol defined in an
@@ -158,7 +158,7 @@ static unsigned handleARMTlsRelocation(u
bool NeedDynId = Body.isPreemptible() || Config->Shared;
bool NeedDynOff = Body.isPreemptible();
- auto AddTlsReloc = [&](uint64_t Off, uint32_t Type, SymbolBody *Dest,
+ auto AddTlsReloc = [&](uint64_t Off, RelType Type, SymbolBody *Dest,
bool Dyn) {
if (Dyn)
In<ELFT>::RelaDyn->addReloc({Type, InX::Got, Off, false, Dest, 0});
@@ -196,7 +196,7 @@ static unsigned handleARMTlsRelocation(u
// Returns the number of relocations processed.
template <class ELFT>
static unsigned
-handleTlsRelocation(uint32_t Type, SymbolBody &Body, InputSectionBase &C,
+handleTlsRelocation(RelType Type, SymbolBody &Body, InputSectionBase &C,
typename ELFT::uint Offset, int64_t Addend, RelExpr Expr) {
if (!(C.Flags & SHF_ALLOC))
return 0;
@@ -299,7 +299,7 @@ handleTlsRelocation(uint32_t Type, Symbo
return 0;
}
-static uint32_t getMipsPairType(uint32_t Type, const SymbolBody &Sym) {
+static uint32_t getMipsPairType(RelType Type, const SymbolBody &Sym) {
switch (Type) {
case R_MIPS_HI16:
return R_MIPS_LO16;
@@ -361,7 +361,7 @@ static bool isRelExpr(RelExpr Expr) {
// If this function returns false, that means we need to emit a
// dynamic relocation so that the relocation will be fixed at load-time.
template <class ELFT>
-static bool isStaticLinkTimeConstant(RelExpr E, uint32_t Type,
+static bool isStaticLinkTimeConstant(RelExpr E, RelType Type,
const SymbolBody &Body,
InputSectionBase &S, uint64_t RelOff) {
// These expressions always compute a constant
@@ -552,7 +552,7 @@ static void errorOrWarn(const Twine &Msg
}
template <class ELFT>
-static RelExpr adjustExpr(SymbolBody &Body, RelExpr Expr, uint32_t Type,
+static RelExpr adjustExpr(SymbolBody &Body, RelExpr Expr, RelType Type,
const uint8_t *Data, InputSectionBase &S,
typename ELFT::uint RelOff) {
if (Body.isGnuIFunc()) {
@@ -646,7 +646,7 @@ static RelExpr adjustExpr(SymbolBody &Bo
// input section.
template <class ELFT, class RelTy>
static int64_t computeAddend(const RelTy &Rel, const uint8_t *Buf) {
- uint32_t Type = Rel.getType(Config->IsMips64EL);
+ RelType Type = Rel.getType(Config->IsMips64EL);
int64_t A = RelTy::IsRela
? getAddend<ELFT>(Rel)
: Target->getImplicitAddend(Buf + Rel.r_offset, Type);
@@ -672,7 +672,7 @@ static int64_t computeMipsAddend(const R
if (RelTy::IsRela)
return 0;
- uint32_t Type = Rel.getType(Config->IsMips64EL);
+ RelType Type = Rel.getType(Config->IsMips64EL);
uint32_t PairTy = getMipsPairType(Type, Body);
if (PairTy == R_MIPS_NONE)
return 0;
@@ -723,7 +723,7 @@ static void reportUndefined(SymbolBody &
template <class RelTy>
static std::pair<uint32_t, uint32_t>
-mergeMipsN32RelTypes(uint32_t Type, uint32_t Offset, RelTy *I, RelTy *E) {
+mergeMipsN32RelTypes(RelType Type, uint32_t Offset, RelTy *I, RelTy *E) {
// MIPS N32 ABI treats series of successive relocations with the same offset
// as a single relocation. The similar approach used by N64 ABI, but this ABI
// packs all relocations into the single relocation record. Here we emulate
@@ -788,7 +788,7 @@ private:
template <class ELFT, class GotPltSection>
static void addPltEntry(PltSection *Plt, GotPltSection *GotPlt,
- RelocationSection<ELFT> *Rel, uint32_t Type,
+ RelocationSection<ELFT> *Rel, RelType Type,
SymbolBody &Sym, bool UseSymVA) {
Plt->addEntry<ELFT>(Sym);
GotPlt->addEntry(Sym);
@@ -800,8 +800,8 @@ static void addGotEntry(SymbolBody &Sym,
InX::Got->addEntry(Sym);
uint64_t Off = Sym.getGotOffset();
- uint32_t DynType;
RelExpr Expr = R_ABS;
+ RelType DynType;
if (Sym.isTls()) {
DynType = Target->TlsGotRel;
@@ -841,7 +841,7 @@ static void scanRelocs(InputSectionBase
for (auto I = Rels.begin(), End = Rels.end(); I != End; ++I) {
const RelTy &Rel = *I;
SymbolBody &Body = Sec.getFile<ELFT>()->getRelocTargetSym(Rel);
- uint32_t Type = Rel.getType(Config->IsMips64EL);
+ RelType Type = Rel.getType(Config->IsMips64EL);
if (Config->MipsN32Abi) {
uint32_t Processed;
@@ -1081,7 +1081,7 @@ ThunkSection *ThunkCreator::addThunkSect
}
std::pair<Thunk *, bool> ThunkCreator::getThunk(SymbolBody &Body,
- uint32_t Type) {
+ RelType Type) {
auto Res = ThunkedSymbols.insert({&Body, std::vector<Thunk *>()});
if (!Res.second) {
// Check existing Thunks for Body to see if they can be reused
Modified: lld/trunk/ELF/Relocations.h
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Relocations.h?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Relocations.h (original)
+++ lld/trunk/ELF/Relocations.h Wed Oct 11 15:49:24 2017
@@ -23,6 +23,9 @@ class InputSectionBase;
class OutputSection;
class OutputSection;
+// Represents a relocation type, such as R_X86_64_PC32 or R_ARM_THM_CALL.
+typedef uint32_t RelType;
+
// List of target-independent relocation types. Relocations read
// from files are converted to these types so that the main code
// doesn't have to know about architecture-specific details.
@@ -111,7 +114,7 @@ template <RelExpr... Exprs> bool isRelEx
// Architecture-neutral representation of relocation.
struct Relocation {
RelExpr Expr;
- uint32_t Type;
+ RelType Type;
uint64_t Offset;
int64_t Addend;
SymbolBody *Sym;
@@ -142,7 +145,7 @@ private:
std::function<void(OutputSection *, std::vector<InputSection *> *,
InputSection *)>
Fn);
- std::pair<Thunk *, bool> getThunk(SymbolBody &Body, uint32_t Type);
+ std::pair<Thunk *, bool> getThunk(SymbolBody &Body, RelType Type);
ThunkSection *addThunkSection(OutputSection *OS,
std::vector<InputSection *> *, uint64_t Off);
// Record all the available Thunks for a Symbol
Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Wed Oct 11 15:49:24 2017
@@ -40,7 +40,7 @@ using namespace lld::elf;
TargetInfo *elf::Target;
-std::string lld::toString(uint32_t Type) {
+std::string lld::toString(RelType Type) {
StringRef S = getELFRelocationTypeName(elf::Config->EMachine, Type);
if (S == "Unknown")
return ("Unknown (" + Twine(Type) + ")").str();
@@ -117,19 +117,18 @@ std::string elf::getErrorLocation(const
TargetInfo::~TargetInfo() {}
-int64_t TargetInfo::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
+int64_t TargetInfo::getImplicitAddend(const uint8_t *Buf, RelType Type) const {
return 0;
}
-bool TargetInfo::usesOnlyLowPageBits(uint32_t Type) const { return false; }
+bool TargetInfo::usesOnlyLowPageBits(RelType Type) const { return false; }
-bool TargetInfo::needsThunk(RelExpr Expr, uint32_t RelocType,
- const InputFile *File, const SymbolBody &S) const {
+bool TargetInfo::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
+ const SymbolBody &S) const {
return false;
}
-bool TargetInfo::inBranchRange(uint32_t RelocType, uint64_t Src,
- uint64_t Dst) const {
+bool TargetInfo::inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const {
return true;
}
@@ -137,7 +136,7 @@ void TargetInfo::writeIgotPlt(uint8_t *B
writeGotPlt(Buf, S);
}
-RelExpr TargetInfo::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+RelExpr TargetInfo::adjustRelaxExpr(RelType Type, const uint8_t *Data,
RelExpr Expr) const {
return Expr;
}
@@ -146,22 +145,22 @@ void TargetInfo::relaxGot(uint8_t *Loc,
llvm_unreachable("Should not have claimed to be relaxable");
}
-void TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
+void TargetInfo::relaxTlsGdToLe(uint8_t *Loc, RelType Type,
uint64_t Val) const {
llvm_unreachable("Should not have claimed to be relaxable");
}
-void TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type,
+void TargetInfo::relaxTlsGdToIe(uint8_t *Loc, RelType Type,
uint64_t Val) const {
llvm_unreachable("Should not have claimed to be relaxable");
}
-void TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
+void TargetInfo::relaxTlsIeToLe(uint8_t *Loc, RelType Type,
uint64_t Val) const {
llvm_unreachable("Should not have claimed to be relaxable");
}
-void TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type,
+void TargetInfo::relaxTlsLdToLe(uint8_t *Loc, RelType Type,
uint64_t Val) const {
llvm_unreachable("Should not have claimed to be relaxable");
}
Modified: lld/trunk/ELF/Target.h
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.h?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Target.h (original)
+++ lld/trunk/ELF/Target.h Wed Oct 11 15:49:24 2017
@@ -15,7 +15,7 @@
#include "llvm/Object/ELF.h"
namespace lld {
-std::string toString(uint32_t RelType);
+std::string toString(elf::RelType Type);
namespace elf {
class InputFile;
@@ -23,12 +23,12 @@ class SymbolBody;
class TargetInfo {
public:
- virtual bool isPicRel(uint32_t Type) const { return true; }
- virtual uint32_t getDynRel(uint32_t Type) const { return Type; }
+ virtual bool isPicRel(RelType Type) const { return true; }
+ virtual RelType getDynRel(RelType Type) const { return Type; }
virtual void writeGotPltHeader(uint8_t *Buf) const {}
virtual void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const {};
virtual void writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const;
- virtual int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const;
+ virtual int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const;
// If lazy binding is supported, the first entry of the PLT has code
// to call the dynamic linker to resolve PLT entries the first time
@@ -40,24 +40,28 @@ public:
unsigned RelOff) const {}
virtual void addPltHeaderSymbols(InputSectionBase *IS) const {}
virtual void addPltSymbols(InputSectionBase *IS, uint64_t Off) const {}
+
// Returns true if a relocation only uses the low bits of a value such that
// all those bits are in in the same page. For example, if the relocation
// only uses the low 12 bits in a system with 4k pages. If this is true, the
// bits will always have the same value at runtime and we don't have to emit
// a dynamic relocation.
- virtual bool usesOnlyLowPageBits(uint32_t Type) const;
+ virtual bool usesOnlyLowPageBits(RelType Type) const;
// Decide whether a Thunk is needed for the relocation from File
// targeting S.
- virtual bool needsThunk(RelExpr Expr, uint32_t RelocType,
- const InputFile *File, const SymbolBody &S) const;
- // Return true if we can reach Dst from Src with Relocation RelocType
- virtual bool inBranchRange(uint32_t RelocType, uint64_t Src,
- uint64_t Dst) const;
- virtual RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+ virtual bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
+ const SymbolBody &S) const;
+
+ // Return true if we can reach Dst from Src with Relocation Type
+ virtual bool inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const;
+
+ virtual RelExpr getRelExpr(RelType Type, const SymbolBody &S,
const InputFile &File,
const uint8_t *Loc) const = 0;
- virtual void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const = 0;
+
+ virtual void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const = 0;
+
virtual ~TargetInfo();
unsigned TlsGdRelaxSkip = 1;
@@ -70,15 +74,15 @@ public:
// end of .got
uint64_t GotBaseSymOff = 0;
- uint32_t CopyRel;
- uint32_t GotRel;
- uint32_t PltRel;
- uint32_t RelativeRel;
- uint32_t IRelativeRel;
- uint32_t TlsDescRel;
- uint32_t TlsGotRel;
- uint32_t TlsModuleIndexRel;
- uint32_t TlsOffsetRel;
+ RelType CopyRel;
+ RelType GotRel;
+ RelType PltRel;
+ RelType RelativeRel;
+ RelType IRelativeRel;
+ RelType TlsDescRel;
+ RelType TlsGotRel;
+ RelType TlsModuleIndexRel;
+ RelType TlsOffsetRel;
unsigned GotEntrySize = 0;
unsigned GotPltEntrySize = 0;
unsigned PltEntrySize;
@@ -97,13 +101,13 @@ public:
// executable OutputSections.
uint32_t TrapInstr = 0;
- virtual RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+ virtual RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
RelExpr Expr) const;
virtual void relaxGot(uint8_t *Loc, uint64_t Val) const;
- virtual void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
- virtual void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
- virtual void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
- virtual void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
+ virtual void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const;
+ virtual void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
+ virtual void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
+ virtual void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
protected:
// On FreeBSD x86_64 the first page cannot be mmaped.
@@ -134,28 +138,28 @@ extern TargetInfo *Target;
TargetInfo *getTarget();
template <unsigned N>
-static void checkInt(uint8_t *Loc, int64_t V, uint32_t Type) {
+static void checkInt(uint8_t *Loc, int64_t V, RelType Type) {
if (!llvm::isInt<N>(V))
error(getErrorLocation(Loc) + "relocation " + lld::toString(Type) +
" out of range");
}
template <unsigned N>
-static void checkUInt(uint8_t *Loc, uint64_t V, uint32_t Type) {
+static void checkUInt(uint8_t *Loc, uint64_t V, RelType Type) {
if (!llvm::isUInt<N>(V))
error(getErrorLocation(Loc) + "relocation " + lld::toString(Type) +
" out of range");
}
template <unsigned N>
-static void checkIntUInt(uint8_t *Loc, uint64_t V, uint32_t Type) {
+static void checkIntUInt(uint8_t *Loc, uint64_t V, RelType Type) {
if (!llvm::isInt<N>(V) && !llvm::isUInt<N>(V))
error(getErrorLocation(Loc) + "relocation " + lld::toString(Type) +
" out of range");
}
template <unsigned N>
-static void checkAlignment(uint8_t *Loc, uint64_t V, uint32_t Type) {
+static void checkAlignment(uint8_t *Loc, uint64_t V, RelType Type) {
if ((V & (N - 1)) != 0)
error(getErrorLocation(Loc) + "improper alignment for relocation " +
lld::toString(Type));
Modified: lld/trunk/ELF/Thunks.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Thunks.cpp?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Thunks.cpp (original)
+++ lld/trunk/ELF/Thunks.cpp Wed Oct 11 15:49:24 2017
@@ -57,7 +57,7 @@ public:
uint32_t size() const override { return 12; }
void writeTo(uint8_t *Buf, ThunkSection &IS) const override;
void addSymbols(ThunkSection &IS) override;
- bool isCompatibleWith(uint32_t RelocType) const override;
+ bool isCompatibleWith(RelType Type) const override;
};
class ARMV7PILongThunk final : public Thunk {
@@ -67,7 +67,7 @@ public:
uint32_t size() const override { return 16; }
void writeTo(uint8_t *Buf, ThunkSection &IS) const override;
void addSymbols(ThunkSection &IS) override;
- bool isCompatibleWith(uint32_t RelocType) const override;
+ bool isCompatibleWith(RelType Type) const override;
};
class ThumbV7ABSLongThunk final : public Thunk {
@@ -77,7 +77,7 @@ public:
uint32_t size() const override { return 10; }
void writeTo(uint8_t *Buf, ThunkSection &IS) const override;
void addSymbols(ThunkSection &IS) override;
- bool isCompatibleWith(uint32_t RelocType) const override;
+ bool isCompatibleWith(RelType Type) const override;
};
class ThumbV7PILongThunk final : public Thunk {
@@ -87,7 +87,7 @@ public:
uint32_t size() const override { return 12; }
void writeTo(uint8_t *Buf, ThunkSection &IS) const override;
void addSymbols(ThunkSection &IS) override;
- bool isCompatibleWith(uint32_t RelocType) const override;
+ bool isCompatibleWith(RelType Type) const override;
};
// MIPS LA25 thunk
@@ -150,9 +150,9 @@ void ARMV7ABSLongThunk::addSymbols(Thunk
addSyntheticLocal("$a", STT_NOTYPE, Offset, 0, &IS);
}
-bool ARMV7ABSLongThunk::isCompatibleWith(uint32_t RelocType) const {
+bool ARMV7ABSLongThunk::isCompatibleWith(RelType Type) const {
// Thumb branch relocations can't use BLX
- return RelocType != R_ARM_THM_JUMP19 && RelocType != R_ARM_THM_JUMP24;
+ return Type != R_ARM_THM_JUMP19 && Type != R_ARM_THM_JUMP24;
}
void ThumbV7ABSLongThunk::writeTo(uint8_t *Buf, ThunkSection &IS) const {
@@ -174,10 +174,9 @@ void ThumbV7ABSLongThunk::addSymbols(Thu
addSyntheticLocal("$t", STT_NOTYPE, Offset, 0, &IS);
}
-bool ThumbV7ABSLongThunk::isCompatibleWith(uint32_t RelocType) const {
+bool ThumbV7ABSLongThunk::isCompatibleWith(RelType Type) const {
// ARM branch relocations can't use BLX
- return RelocType != R_ARM_JUMP24 && RelocType != R_ARM_PC24 &&
- RelocType != R_ARM_PLT32;
+ return Type != R_ARM_JUMP24 && Type != R_ARM_PC24 && Type != R_ARM_PLT32;
}
void ARMV7PILongThunk::writeTo(uint8_t *Buf, ThunkSection &IS) const {
@@ -202,9 +201,9 @@ void ARMV7PILongThunk::addSymbols(ThunkS
addSyntheticLocal("$a", STT_NOTYPE, Offset, 0, &IS);
}
-bool ARMV7PILongThunk::isCompatibleWith(uint32_t RelocType) const {
+bool ARMV7PILongThunk::isCompatibleWith(RelType Type) const {
// Thumb branch relocations can't use BLX
- return RelocType != R_ARM_THM_JUMP19 && RelocType != R_ARM_THM_JUMP24;
+ return Type != R_ARM_THM_JUMP19 && Type != R_ARM_THM_JUMP24;
}
void ThumbV7PILongThunk::writeTo(uint8_t *Buf, ThunkSection &IS) const {
@@ -229,10 +228,9 @@ void ThumbV7PILongThunk::addSymbols(Thun
addSyntheticLocal("$t", STT_NOTYPE, Offset, 0, &IS);
}
-bool ThumbV7PILongThunk::isCompatibleWith(uint32_t RelocType) const {
+bool ThumbV7PILongThunk::isCompatibleWith(RelType Type) const {
// ARM branch relocations can't use BLX
- return RelocType != R_ARM_JUMP24 && RelocType != R_ARM_PC24 &&
- RelocType != R_ARM_PLT32;
+ return Type != R_ARM_JUMP24 && Type != R_ARM_PC24 && Type != R_ARM_PLT32;
}
// Write MIPS LA25 thunk code to call PIC function from the non-PIC one.
@@ -312,7 +310,7 @@ Thunk::Thunk(const SymbolBody &D) : Dest
Thunk::~Thunk() = default;
// Creates a thunk for Thumb-ARM interworking.
-static Thunk *addThunkArm(uint32_t Reloc, SymbolBody &S) {
+static Thunk *addThunkArm(RelType Reloc, SymbolBody &S) {
// ARM relocations need ARM to Thumb interworking Thunks.
// Thumb relocations need Thumb to ARM relocations.
// Use position independent Thunks if we require position independent code.
@@ -332,7 +330,7 @@ static Thunk *addThunkArm(uint32_t Reloc
fatal("unrecognized relocation type");
}
-static Thunk *addThunkMips(uint32_t Reloc, SymbolBody &S) {
+static Thunk *addThunkMips(RelType Type, SymbolBody &S) {
if ((S.StOther & STO_MIPS_MICROMIPS) && isMipsR6())
return make<MicroMipsR6Thunk>(S);
if (S.StOther & STO_MIPS_MICROMIPS)
@@ -340,11 +338,11 @@ static Thunk *addThunkMips(uint32_t Relo
return make<MipsThunk>(S);
}
-Thunk *addThunk(uint32_t RelocType, SymbolBody &S) {
+Thunk *addThunk(RelType Type, SymbolBody &S) {
if (Config->EMachine == EM_ARM)
- return addThunkArm(RelocType, S);
+ return addThunkArm(Type, S);
else if (Config->EMachine == EM_MIPS)
- return addThunkMips(RelocType, S);
+ return addThunkMips(Type, S);
llvm_unreachable("add Thunk only supported for ARM and Mips");
return nullptr;
}
Modified: lld/trunk/ELF/Thunks.h
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Thunks.h?rev=315525&r1=315524&r2=315525&view=diff
==============================================================================
--- lld/trunk/ELF/Thunks.h (original)
+++ lld/trunk/ELF/Thunks.h Wed Oct 11 15:49:24 2017
@@ -41,9 +41,9 @@ public:
// a branch and fall through to the first Symbol in the Target.
virtual InputSection *getTargetInputSection() const { return nullptr; }
- // To reuse a Thunk the caller as identified by the RelocType must be
+ // To reuse a Thunk the caller as identified by the Type must be
// compatible with it.
- virtual bool isCompatibleWith(uint32_t RelocType) const { return true; }
+ virtual bool isCompatibleWith(RelType Type) const { return true; }
// The alignment requirement for this Thunk, defaults to the size of the
// typical code section alignment.
@@ -55,7 +55,7 @@ public:
// For a Relocation to symbol S create a Thunk to be added to a synthetic
// ThunkSection. At present there are implementations for ARM and Mips Thunks.
-Thunk *addThunk(uint32_t RelocType, SymbolBody &S);
+Thunk *addThunk(RelType Type, SymbolBody &S);
} // namespace elf
} // namespace lld
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