[llvm] r315002 - [ARM/AARCH64] Make test MachineBranchProb.ll more robust and re-enable for ARM/AArch64

[Balaram Makam via llvm-commits]

Author: bmakam
Date: Thu Oct  5 11:33:34 2017
New Revision: 315002

URL: http://llvm.org/viewvc/llvm-project?rev=315002&view=rev
Log:
[ARM/AARCH64] Make test MachineBranchProb.ll more robust and re-enable for ARM/AArch64

Summary: Make test robust enough to not fail due to CFG changes and re-enable for ARM/AArch64.

Reviewers: rovka, fhahn

Reviewed By: fhahn

Subscribers: fhahn, aemerson, rengolin, mcrosier, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D38590

Modified:
    llvm/trunk/test/CodeGen/Generic/MachineBranchProb.ll

Modified: llvm/trunk/test/CodeGen/Generic/MachineBranchProb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/MachineBranchProb.ll?rev=315002&r1=315001&r2=315002&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/MachineBranchProb.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/MachineBranchProb.ll Thu Oct  5 11:33:34 2017
@@ -1,8 +1,5 @@
 ; RUN: llc < %s -print-machineinstrs=expand-isel-pseudos -o /dev/null 2>&1 | FileCheck %s
 
-; ARM & AArch64 run an extra SimplifyCFG which disrupts this test.
-; UNSUPPORTED: arm,aarch64
-
 ; Hexagon runs passes that renumber the basic blocks, causing this test
 ; to fail.
 ; XFAIL: hexagon
@@ -10,6 +7,8 @@
 ; Bug: PR31899
 ; XFAIL: avr
 
+declare void @foo()
+
 ; Make sure we have the correct weight attached to each successor.
 define i32 @test2(i32 %x) nounwind uwtable readnone ssp {
 ; CHECK-LABEL: Machine code for function test2:
@@ -29,6 +28,8 @@ entry:
 ; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}36.36%) BB#3({{[0-9a-fx/= ]+}}63.64%)
 
 sw.bb:
+; this call will prevent simplifyCFG from optimizing the block away in ARM/AArch64.
+  tail call void @foo()
   br label %return
 
 sw.bb1: