[llvm] r314984 - revert r314698 - [InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Thu Oct  5 07:26:15 2017
New Revision: 314984

URL: http://llvm.org/viewvc/llvm-project?rev=314984&view=rev
Log:
revert r314698 - [InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)

There is a bot failure that appears to be related to this change:
http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost-neon/builds/2117

...so reverting to confirm that and attempting to keep the bot green while investigating.

Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
    llvm/trunk/test/Transforms/InstCombine/icmp-shr.ll

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=314984&r1=314983&r2=314984&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Thu Oct  5 07:26:15 2017
@@ -2057,15 +2057,15 @@ Instruction *InstCombiner::foldICmpShrCo
           (!IsAShr && C.shl(ShAmtVal).lshr(ShAmtVal) == C)) &&
          "Expected icmp+shr simplify did not occur.");
 
-  // If the bits shifted out are known zero, compare the unshifted value:
+  // Check if the bits shifted out are known to be zero. If so, we can compare
+  // against the unshifted value:
   //  (X & 4) >> 1 == 2  --> (X & 4) == 4.
   Constant *ShiftedCmpRHS = ConstantInt::get(Shr->getType(), C << ShAmtVal);
-  if (Shr->isExact())
-    return new ICmpInst(Pred, X, ShiftedCmpRHS);
-
   if (Shr->hasOneUse()) {
-    // Canonicalize the shift into an 'and':
-    // icmp eq/ne (shr X, ShAmt), C --> icmp eq/ne (and X, HiMask), (C << ShAmt)
+    if (Shr->isExact())
+      return new ICmpInst(Pred, X, ShiftedCmpRHS);
+
+    // Otherwise strength reduce the shift into an 'and'.
     APInt Val(APInt::getHighBitsSet(TypeBits, TypeBits - ShAmtVal));
     Constant *Mask = ConstantInt::get(Shr->getType(), Val);
     Value *And = Builder.CreateAnd(X, Mask, Shr->getName() + ".mask");

Modified: llvm/trunk/test/Transforms/InstCombine/icmp-shr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp-shr.ll?rev=314984&r1=314983&r2=314984&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/icmp-shr.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/icmp-shr.ll Thu Oct  5 07:26:15 2017
@@ -483,7 +483,7 @@ declare void @foo(i32)
 define i1 @exact_multiuse(i32 %x) {
 ; CHECK-LABEL: @exact_multiuse(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr exact i32 %x, 7
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 %x, 131072
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[SH]], 1024
 ; CHECK-NEXT:    call void @foo(i32 [[SH]])
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;