[PATCH] D38160: [AArch64] Improve codegen for inverted overflow checking intrinsics

[Javed Absar via Phabricator via llvm-commits]

javed.absar added inline comments.


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:1987
+       Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO) &&
+      COp1 && COp1->getZExtValue() == 1) {
+    // Only lower legal XALUO ops.
----------------
Perhaps the COp1 test should be first test for efficiency e.g.

if (ConstantSDNode *OtherIsConst = dyn_cast<ConstantSDNode>(Other) ) {
   if (....) {
     ...
   }
}

COp1 => OtherIsConst


Repository:
  rL LLVM

https://reviews.llvm.org/D38160