[PATCH] D38315: [ARM] Add f16 type support and code generation (part 1/2)

Oliver Stannard via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 4 02:51:16 PDT 2017


olista01 added inline comments.


================
Comment at: test/CodeGen/ARM/fp16-instructions.ll:14
+;CHECK-FP16-LABEL:      Sub:
+;CHECK-FP16:            vsub.f32  s0, s0, s2
+;CHECK-FP16-NEXT:       mov pc, lr
----------------
This looks like it's returning the result as a 32-bit float, which is wrong. It should be a 16-bit float in the least-significant half of s0.

Also, are there any conversion instructions before the vsub? If so, it would be better to include them in the test, and if not then the arguments are being passed incorrectly too.


https://reviews.llvm.org/D38315





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