[PATCH] D38315: [ARM] Add f16 type support and code generation (part 1/2)

Sjoerd Meijer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 4 02:19:51 PDT 2017


SjoerdMeijer updated this revision to Diff 117638.
SjoerdMeijer added a comment.

I have:

- removed the f16 type from the calling conventions except for ARM_AAPCS_VFP. It's necessary to add them elsewhere, the default behaviour is what we want.
- added a test case using the hard float abi, but without fullfp16 support.
- added some comments about the HPR register class.


https://reviews.llvm.org/D38315

Files:
  lib/Target/ARM/ARMCallingConv.td
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMInstrVFP.td
  lib/Target/ARM/ARMRegisterInfo.td
  lib/Target/ARM/Disassembler/ARMDisassembler.cpp
  test/CodeGen/ARM/fp16-instructions.ll

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