[llvm] r314881 - [IRCE] Temporarily disable unsigned latch conditions by default

Max Kazantsev via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 3 23:53:23 PDT 2017


Author: mkazantsev
Date: Tue Oct  3 23:53:22 2017
New Revision: 314881

URL: http://llvm.org/viewvc/llvm-project?rev=314881&view=rev
Log:
[IRCE] Temporarily disable unsigned latch conditions by default

We have found some corner cases connected to range intersection where IRCE makes
a bad thing when the latch condition is unsigned. The fix for that will go as a follow up.
This patch temporarily disables IRCE for unsigned latch conditions until the issue is fixed.

The unsigned latch conditions were introduced to IRCE by rL310027.

Differential Revision: https://reviews.llvm.org/D38529

Added:
    llvm/trunk/test/Transforms/IRCE/range_intersect_miscompile.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
    llvm/trunk/test/Transforms/IRCE/clamp.ll
    llvm/trunk/test/Transforms/IRCE/eq_ne.ll
    llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll
    llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll
    llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll

Modified: llvm/trunk/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp?rev=314881&r1=314880&r2=314881&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp Tue Oct  3 23:53:22 2017
@@ -79,6 +79,9 @@ static cl::opt<int> MaxExitProbReciproca
 static cl::opt<bool> SkipProfitabilityChecks("irce-skip-profitability-checks",
                                              cl::Hidden, cl::init(false));
 
+static cl::opt<bool> AllowUnsignedLatchCondition("irce-allow-unsigned-latch",
+                                                 cl::Hidden, cl::init(false));
+
 static const char *ClonedLoopTag = "irce.loop.clone";
 
 #define DEBUG_TYPE "irce"
@@ -889,6 +892,15 @@ LoopStructure::parseLoopStructure(Scalar
 
     IsSignedPredicate =
         Pred == ICmpInst::ICMP_SLT || Pred == ICmpInst::ICMP_SGT;
+
+    // FIXME: We temporarily disable unsigned latch conditions by default
+    // because of found problems with intersecting signed and unsigned ranges.
+    // We are going to turn it on once the problems are fixed.
+    if (!IsSignedPredicate && !AllowUnsignedLatchCondition) {
+      FailureReason = "unsigned latch conditions are explicitly prohibited";
+      return None;
+    }
+
     // The predicate that we need to check that the induction variable lies
     // within bounds.
     ICmpInst::Predicate BoundPred =
@@ -964,6 +976,15 @@ LoopStructure::parseLoopStructure(Scalar
 
     IsSignedPredicate =
         Pred == ICmpInst::ICMP_SLT || Pred == ICmpInst::ICMP_SGT;
+
+    // FIXME: We temporarily disable unsigned latch conditions by default
+    // because of found problems with intersecting signed and unsigned ranges.
+    // We are going to turn it on once the problems are fixed.
+    if (!IsSignedPredicate && !AllowUnsignedLatchCondition) {
+      FailureReason = "unsigned latch conditions are explicitly prohibited";
+      return None;
+    }
+
     // The predicate that we need to check that the induction variable lies
     // within bounds.
     ICmpInst::Predicate BoundPred =

Modified: llvm/trunk/test/Transforms/IRCE/clamp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/clamp.ll?rev=314881&r1=314880&r2=314881&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/clamp.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/clamp.ll Tue Oct  3 23:53:22 2017
@@ -1,4 +1,4 @@
-; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s
+; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -irce-allow-unsigned-latch=true -S < %s 2>&1 | FileCheck %s
 
 ; The test demonstrates that incorrect behavior of Clamp may lead to incorrect
 ; calculation of post-loop exit condition.

Modified: llvm/trunk/test/Transforms/IRCE/eq_ne.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/eq_ne.ll?rev=314881&r1=314880&r2=314881&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/eq_ne.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/eq_ne.ll Tue Oct  3 23:53:22 2017
@@ -1,4 +1,4 @@
-; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s
+; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -irce-allow-unsigned-latch=true -S < %s 2>&1 | FileCheck %s
 
 ; CHECK: irce: in function test_01: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 ; CHECK: irce: in function test_01u: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>

Added: llvm/trunk/test/Transforms/IRCE/range_intersect_miscompile.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/range_intersect_miscompile.ll?rev=314881&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/range_intersect_miscompile.ll (added)
+++ llvm/trunk/test/Transforms/IRCE/range_intersect_miscompile.ll Tue Oct  3 23:53:22 2017
@@ -0,0 +1,45 @@
+; RUN: opt -irce -S < %s 2>&1 | FileCheck %s
+
+; This test demonstrates a miscompile: the outer loop's IV iterates in range of
+; [2, 400) and the range check is done against value 331. Due to a bug in range
+; intersection IRCE manages to eliminate the range check without inserting a
+; postloop, which is incorrect. So far IRCE is prohibited for this case.
+
+define void @test_01() {
+
+; CHECK-LABEL: test_01
+; CHECK-NOT:   br i1 true
+
+entry:
+  br label %loop_header
+
+loop_header:                            ; preds = %loop_latch, %entry
+  %iv = phi i32 [ 2, %entry ], [ %iv_next, %loop_latch ]
+  %iv.prev = phi i32 [ 1, %entry ], [ %iv, %loop_latch ]
+  %tmp2 = icmp sgt i32 %iv.prev, -1
+  br i1 %tmp2, label %loop_header.split.us, label %exit
+
+loop_header.split.us:                   ; preds = %loop_header
+  br label %inner_loop
+
+inner_loop:                                   ; preds = %inner_loop, %loop_header.split.us
+  %inner_iv = phi i32 [ 1, %loop_header.split.us ], [ %inner_iv_next, %inner_loop ]
+  %inner_iv_next = add nuw nsw i32 %inner_iv, 1
+  %inner_cond = icmp ult i32 %inner_iv_next, 31
+  br i1 %inner_cond, label %inner_loop, label %range_check_block
+
+exit:                                            ; preds = %loop_latch, %loop_header
+  ret void
+
+range_check_block:                                          ; preds = %inner_loop
+  %range_check = icmp slt i32 %iv, 331
+  br i1 %range_check, label %loop_latch, label %deopt
+
+loop_latch:                                         ; preds = %range_check_block
+  %iv_next = add i32 %iv, 1
+  %loop_cond = icmp ult i32 %iv_next, 400
+  br i1 %loop_cond, label %loop_header, label %exit
+
+deopt:                                          ; preds = %range_check_block
+  ret void
+}

Modified: llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll?rev=314881&r1=314880&r2=314881&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll Tue Oct  3 23:53:22 2017
@@ -1,4 +1,4 @@
-; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s
+; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -irce-allow-unsigned-latch=true -S < %s 2>&1 | FileCheck %s
 
 ; CHECK: irce: in function test_01: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 ; CHECK: irce: in function test_02: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>

Modified: llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll?rev=314881&r1=314880&r2=314881&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll Tue Oct  3 23:53:22 2017
@@ -1,4 +1,4 @@
-; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s
+; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -irce-allow-unsigned-latch=true -S < %s 2>&1 | FileCheck %s
 
 ; CHECK: irce: in function test_01: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 ; CHECK: irce: in function test_02: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>

Modified: llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll?rev=314881&r1=314880&r2=314881&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll Tue Oct  3 23:53:22 2017
@@ -1,4 +1,4 @@
-; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s
+; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -irce-allow-unsigned-latch=true -S < %s 2>&1 | FileCheck %s
 
 ; CHECK: irce: in function test_01: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 ; CHECK: irce: in function test_02: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>




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