[PATCH] D38235: [UnreachableBlockElim] Use COPY if PHI input is undef

[Mikael Holmén via Phabricator via llvm-commits]

uabelho added a comment.

In https://reviews.llvm.org/D38235#884338, @kparzysz wrote:

> Looks good.  Thanks.
>
> Could you change the testcase to MIR and only run the unreachable block elimination?


I've tried but I don't understand what happens when I try to make a MIR test.

First weirdness:

Even if I try to stop before unreachable machine block elimination with
 llc -optimize-regalloc -O0 -o - -stop-before=unreachable-mbb-elimination
it doesn't stop before? WIth -debug-pass=Executions I see:

[...]
[2017-10-03 10:06:20.575253544] 0x3c95710     Executing Pass 'Process Implicit Definitions' on Function 'f'...
[2017-10-03 10:06:20.575288256] 0x3c95710     Made Modification 'Process Implicit Definitions' on Function 'f'...
[2017-10-03 10:06:20.575317590] 0x3c95710      Freeing Pass 'Process Implicit Definitions' on Function 'f'...
[2017-10-03 10:06:20.575343782] 0x3c95710     Executing Pass 'Remove unreachable machine basic blocks' on Function 'f'...
[2017-10-03 10:06:20.575384081] 0x3c95710     Made Modification 'Remove unreachable machine basic blocks' on Function 'f'...
[2017-10-03 10:06:20.575412158] 0x3c95710     Executing Pass 'Live Variable Analysis' on Function 'f'...
[2017-10-03 10:06:20.575482280] 0x3c95710     Executing Pass 'MachineDominator Tree Construction' on Function 'f'...
[2017-10-03 10:06:20.575531100] 0x3c95710     Executing Pass 'Machine Natural Loop Construction' on Function 'f'...
[2017-10-03 10:06:20.575574333] 0x3c95710     Executing Pass 'Eliminate PHI nodes for register allocation' on Function 'f'...
[2017-10-03 10:06:20.575609045] 0x3c95710      Freeing Pass 'Eliminate PHI nodes for register allocation' on Function 'f'...
[2017-10-03 10:06:20.575635795] 0x3c95710      Freeing Pass 'Remove unreachable machine basic blocks' on Function 'f'...
[...]
Shouldn't it stop before "Executing Pass 'Remove unreachable machine basic blocks' on Function 'f'" ?

Second weirdness:
If I try to work around the above by instead stopping after "Process Implicit Definitions" and then just
run run-pass=unreachable-mbb-elimination I get

Machine code for function f: IsSSA
==================================

BB#0: derived from LLVM BB %bb0

      JMP_1 <BB#1>
  Successors according to CFG: BB#1(0x80000000 / 0x80000000 = 100.00%)

BB#1: derived from LLVM BB %bb1

  Predecessors according to CFG: BB#0 BB#2
      %vreg0<def> = PHI %vreg2<undef>, <BB#0>, %vreg3, <BB#2>; GR32:%vreg0,%vreg2,%vreg3
      %vreg3<def,tied1> = ADD32ri8 %vreg0<kill,tied0>, 1, %EFLAGS<imp-def>; GR32:%vreg3,%vreg0
      JMP_1 <BB#3>
  Successors according to CFG: BB#3(0x80000000 / 0x80000000 = 100.00%)

BB#2: derived from LLVM BB %bb2

      JMP_1 <BB#1>
  Successors according to CFG: BB#1(0x80000000 / 0x80000000 = 100.00%)

BB#3: derived from LLVM BB %bb3

  Predecessors according to CFG: BB#1
      RETQ

End machine code for function f.
================================

  - Bad machine code: PHI operand is not live-out from predecessor ***
- function:    f
- basic block: BB#1 bb1 (0x4995cf8)
- instruction: %vreg0<def> = PHI
- operand 1:   %vreg2<undef>

LLVM ERROR: Found 1 machine code errors.

So the MIR output from processimpdefs is not accepted as input.

So the smallest MIR test I've managed to do is if I stop before processimpdefs
and then run with that output as input with
-run-pass=processimpdefs -run-pass=unreachable-mbb-elimination.

I'll upload that new testcase in a minute.


https://reviews.llvm.org/D38235