[PATCH] D38469: CodeView symbol dumper: use symbolic names for registers

Zachary Turner via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 2 10:57:11 PDT 2017


zturner added inline comments.


================
Comment at: test/DebugInfo/COFF/fp-stack.ll:15
 ; OBJ:    DefRangeRegisterSym {
-; OBJ:      Register: 128
+; OBJ:      Register: 0x80
 ; OBJ:      MayHaveNoName: 0
----------------
rnk wrote:
> hans wrote:
> > hans wrote:
> > > This one is a bit mysterious.. 128 / 0x80 is not in the RegisterId. Is the enum missing floating-point registers perhaps?
> > Oh, I guess it's FP0. I'll see if I can add it to the enum in a follow-up.
> I guess it's FP0, from reading the comments in X86MCTargetDesc.cpp:
>   // The x87 registers start at 128 and are numbered sequentially.
>   unsigned FP0Start = 128;
>   for (unsigned I = 0; I < 8; ++I)
>     MRI->mapLLVMRegToCVReg(X86::FP0 + I, FP0Start + I);
> 
These enumeration values are derived from the `CV_HREG_e` enumeration which is in `cvconst.h`

https://github.com/Microsoft/microsoft-pdb/blob/master/include/cvconst.h

In the followup, can you call them `ST0`, `ST1`, etc, to maintain naming consistency with the enumeration in cvconst?


https://reviews.llvm.org/D38469





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