[PATCH] D38347: [PATCH][ARM] Fix disassembly for conditional VMRS and VMSR instructions in ARM mode
Andre Vieira via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 28 02:20:25 PDT 2017
avieira created this revision.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.
Hi all,
In https://reviews.llvm.org/D36306 I changed the disassembly for VMRS and VMSR and this didnt handle the disassembly for the conditional variants of these instructions in ARM mode.
This patch fixes that and adds some extra tests.
Is this OK?
Cheers,
Andre
https://reviews.llvm.org/D38347
Files:
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
test/MC/Disassembler/ARM/arm-vmrs_vmsr.txt
test/MC/Disassembler/ARM/thumb-vmrs_vmsr.txt
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D38347.116947.patch
Type: text/x-patch
Size: 6198 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170928/8c02c061/attachment.bin>
More information about the llvm-commits
mailing list