[PATCH] D38316: [InstCombine] replace bitcast to scalar + insertelement with widening shuffle + vector bitcast

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

In https://reviews.llvm.org/D38316#882635, @efriedma wrote:

> No, you're right, that's still three instructions; I didn't realize there wasn't a ymm version of vpinsrd.


But looking at that IR again, it's not a simple match applied twice. Let me see what this would look like in the DAG with insert_subvector...

I guess the question is does this IR patch have enough value to stand by itself? It does let us kill one IR instruction for the case in the bug report. But I agree we need something else in the DAG.


https://reviews.llvm.org/D38316