[PATCH] D38268: [Builtins] ARM: Fix msr assembly instruction use for Thumb2.

[Manoj Gupta via Phabricator via llvm-commits]

manojgupta created this revision.
Herald added subscribers: javed.absar, aemerson.

MSR instruction in Thumb2 does not support immediate operand.
Fix this by moving the condition for V7-M to Thumb2 since V7-M support
Thumb2 only. With this change, aeabi_cfcmp.s and aeabi_cdcmp.S files can
be assembled in Thumb2 mode. (This is split out from the review https://reviews.llvm.org/D38227).


https://reviews.llvm.org/D38268

Files:
  lib/builtins/arm/aeabi_cdcmp.S
  lib/builtins/arm/aeabi_cfcmp.S


Index: lib/builtins/arm/aeabi_cfcmp.S
===================================================================
--- lib/builtins/arm/aeabi_cfcmp.S
+++ lib/builtins/arm/aeabi_cfcmp.S
@@ -48,7 +48,7 @@
         // NaN has been ruled out, so __aeabi_cfcmple can't trap
         bne __aeabi_cfcmple
 
-#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
+#if defined(USE_THUMB_2)
         mov ip, #APSR_C
         msr APSR_nzcvq, ip
 #else
Index: lib/builtins/arm/aeabi_cdcmp.S
===================================================================
--- lib/builtins/arm/aeabi_cdcmp.S
+++ lib/builtins/arm/aeabi_cdcmp.S
@@ -48,7 +48,7 @@
         // NaN has been ruled out, so __aeabi_cdcmple can't trap
         bne __aeabi_cdcmple
 
-#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
+#if defined(USE_THUMB_2)
         mov ip, #APSR_C
         msr APSR_nzcvq, ip
 #else


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