[llvm] r314183 - [AVR] Fix the build after setting alignment to 1 in r314179

[Dylan McKay via llvm-commits]

Author: dylanmckay
Date: Mon Sep 25 19:07:54 2017
New Revision: 314183

URL: http://llvm.org/viewvc/llvm-project?rev=314183&view=rev
Log:
[AVR] Fix the build after setting alignment to 1 in r314179

Changing all types to be byte-aligned broke a small number of tests.

Modified:
    llvm/trunk/test/CodeGen/AVR/call.ll
    llvm/trunk/test/CodeGen/AVR/directmem.ll
    llvm/trunk/test/CodeGen/AVR/varargs.ll

Modified: llvm/trunk/test/CodeGen/AVR/call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AVR/call.ll?rev=314183&r1=314182&r2=314183&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AVR/call.ll (original)
+++ llvm/trunk/test/CodeGen/AVR/call.ll Mon Sep 25 19:07:54 2017
@@ -31,8 +31,8 @@ define i8 @calli8_reg() {
 define i8 @calli8_stack() {
 ; CHECK-LABEL: calli8_stack:
 ; CHECK: ldi [[REG1:r[0-9]+]], 10
-; CHECK: push [[REG1]]
-; CHECK: ldi [[REG1]], 11
+; CHECK: ldi [[REG2:r[0-9]+]], 11
+; CHECK: push [[REG2]]
 ; CHECK: push [[REG1]]
 ; CHECK: call foo8_3
     %result1 = call i8 @foo8_3(i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11)
@@ -142,7 +142,7 @@ define void @testcallprologue() {
 ; CHECK-LABEL: testcallprologue:
 ; CHECK: push r28
 ; CHECK: push r29
-; CHECK: sbiw r28, 28
+; CHECK: sbiw r28, 27
 ; CHECK: ldi [[REG1:r[0-9]+]], 88
 ; CHECK: std Y+9, [[REG1]]
 ; CHECK: ldi [[REG1:r[0-9]+]], 11

Modified: llvm/trunk/test/CodeGen/AVR/directmem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AVR/directmem.ll?rev=314183&r1=314182&r2=314183&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AVR/directmem.ll (original)
+++ llvm/trunk/test/CodeGen/AVR/directmem.ll Mon Sep 25 19:07:54 2017
@@ -33,12 +33,12 @@ define i8 @global8_load() {
 
 define void @array8_store() {
 ; CHECK-LABEL: array8_store:
+; CHECK: ldi [[REG1:r[0-9]+]], 3
+; CHECK: sts char.array+2, [[REG1]]
+; CHECK: ldi [[REG3:r[0-9]+]], 1
 ; CHECK: ldi [[REG2:r[0-9]+]], 2
 ; CHECK: sts char.array+1, [[REG2]]
-; CHECK: ldi [[REG1:r[0-9]+]], 1
-; CHECK: sts char.array, [[REG1]]
-; CHECK: ldi [[REG:r[0-9]+]], 3
-; CHECK: sts char.array+2, [[REG]]
+; CHECK: sts char.array, [[REG3]]
   store i8 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @char.array, i32 0, i64 0)
   store i8 2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @char.array, i32 0, i64 1)
   store i8 3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @char.array, i32 0, i64 2)

Modified: llvm/trunk/test/CodeGen/AVR/varargs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AVR/varargs.ll?rev=314183&r1=314182&r2=314183&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AVR/varargs.ll (original)
+++ llvm/trunk/test/CodeGen/AVR/varargs.ll Mon Sep 25 19:07:54 2017
@@ -27,8 +27,8 @@ define i16 @varargs1(i8* nocapture %x, .
 
 define i16 @varargs2(i8* nocapture %x, ...) {
 ; CHECK-LABEL: varargs2:
-; CHECK: ld r24, Z
-; CHECK: ldd r25, Z+1
+; CHECK: ldd r24, [[REG:X|Y|Z]]+{{[0-9]+}}
+; CHECK: ldd r25, [[REG]]+{{[0-9]+}}
   %ap = alloca i8*
   %ap1 = bitcast i8** %ap to i8*
   call void @llvm.va_start(i8* %ap1)