[PATCH] D37730: [PowerPC] eliminate unconditional branch to the next instruction

[Hiroshi Inoue via Phabricator via llvm-commits]

inouehrs marked 2 inline comments as done.
inouehrs added a comment.

In https://reviews.llvm.org/D37730#878470, @echristo wrote:

> Seems like we might want to have block layout clean up this sort of branch rather than analyzeBranch since we could theoretically make the same change in every backend?


I think this optimization should be machine dependent based on the following comment in MachineBlockPlacement.cpp. X86 backend already implements the same optimization.

  // Indeed, the target may be able to optimize the branches in a way we
  // cannot because all branches may not be analyzable.
  // E.g., the target may be able to remove an unconditional branch to
  // a fallthrough when it occurs after predicated terminators.



================
Comment at: lib/Target/PowerPC/PPCInstrInfo.cpp:491
+    MachineFunction::iterator BBI = MBB.getIterator();
+    MachineFunction::iterator NextBBI = std::next(BBI);
+    // If the BB end with an unconditional branch to the fallthrough BB,
----------------
inouehrs wrote:
> nemanjai wrote:
> > This makes the assumption that the blocks are ordered in in the `MachineFunction` in the same order in which they'll be emitted. Can you add a comment with a quick explanation of why you're allowed to make that assumption.
> I added a comment.
> I am assuming that we can always find fallthrough BB based on `MachineFunction::iterator` in machine IR. Is there any case that we cannot assume so?
I rewrote the code by using a helper function, `MachineBasicBlock::isLayoutSuccessor`.


https://reviews.llvm.org/D37730