[PATCH] D37896: [DAGCombine] Resolving PR34474 by transforming mul(x, 2^c +/- 1) -> sub/add(shl(x, c) x) for any type including vector types

Michael Haidl via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 25 05:04:33 PDT 2017


pacxx updated this revision to Diff 116473.
pacxx added a comment.
Herald added a subscriber: javed.absar.

Updated version that transforms all proposed patterns for multiplications into shift patterns. Since the code got quite long it was moved to an own function in DAGCombiner. To avoid regressions with existing transformations, the patch currently only transforms multiplications of vector types. 
To avoid problems with the Hexagon backend, the transformation is only performed iff the used vector type is a legal type for the backend.

More tests for the patch were added to vector-mul.ll.

Failing tests were updated to preserve semantic of the tests where necessary and auto updated otherwise.


https://reviews.llvm.org/D37896

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/AArch64/aarch64-smull.ll
  test/CodeGen/ARM/2012-08-23-legalize-vmull.ll
  test/CodeGen/ARM/vmul.ll
  test/CodeGen/Hexagon/vect/vect-cst-v4i32.ll
  test/CodeGen/Hexagon/vect/vect-vsplatb.ll
  test/CodeGen/Hexagon/vect/vect-vsplath.ll
  test/CodeGen/X86/combine-shl.ll
  test/CodeGen/X86/masked_gather_scatter.ll
  test/CodeGen/X86/vector-idiv-sdiv-128.ll
  test/CodeGen/X86/vector-idiv-sdiv-256.ll
  test/CodeGen/X86/vector-idiv-sdiv-512.ll
  test/CodeGen/X86/vector-idiv-udiv-128.ll
  test/CodeGen/X86/vector-idiv-udiv-256.ll
  test/CodeGen/X86/vector-idiv-udiv-512.ll
  test/CodeGen/X86/vector-mul.ll
  test/CodeGen/X86/vselect-avx.ll

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