[PATCH] D37983: Add instruction subset for the ARC backend

[Tatyana Krasnukha via Phabricator via llvm-commits]

tatyana-krasnukha added inline comments.


================
Comment at: ARC/ARCInstrInfo.td:421
+//----------------------------------------------------------------------------
+class COMPACT_MOV_S :
+  F16_COMPACT<0b0, (outs GPR32:$g), (ins GPR32:$h),
----------------
petecoup wrote:
> If we map bits 10-8,4-3 to the g register, do we need the custom decoder method anymore?
Yes, it is required to handle such cases as limm data operand or no destination (MOV_S 0,h and MOV_S 0,limm). I haven't found the way to implement it in .td


Repository:
  rL LLVM

https://reviews.llvm.org/D37983