[PATCH] D37899: [SystemZ] Implement shouldCoalesce() to help regalloc to avoid running out of registers with GR128 regs

Jonas Paulsson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 22 06:01:01 PDT 2017


jonpa added a comment.

In https://reviews.llvm.org/D37899#875173, @uweigand wrote:

> In https://reviews.llvm.org/D37899#875075, @jonpa wrote:
>
> > Test cases updated. As expected, there are now more register moves whenever the coalescer is disabled by this patch.
>
>
> Huh.  This seems more extreme than I expected, it looks like just about *every* load of a 128-bit value from memory now reloads into another set of registers, even in those quite simple test cases ...   Is this just the coalescing or is there something else going on?


Yes, this is indeed more than needed.

For atomic-load-05.ll, I see during isel:

  Optimized lowered selection DAG: BB#0 'f1:'
  SelectionDAG has 12 nodes:
    t0: ch = EntryToken
        t2: i64,ch = CopyFromReg t0, Register:i64 %vreg0
      t6: ch = CopyToReg t0, Register:i64 %vreg2, t2
      t4: i64,ch = CopyFromReg t0, Register:i64 %vreg1
    t7: i128,ch = AtomicLoad<Volatile LD16[%src]> t6, t4
        t8: i64,ch = CopyFromReg t0, Register:i64 %vreg2
      t11: ch = store<ST16[<unknown>](align=8)> t7:1, t7, t8, undef:i64
    t12: ch = SystemZISD::RET_FLAG t11
  
  
  Type-legalized selection DAG: BB#0 'f1:'
  SelectionDAG has 20 nodes:
    t0: ch = EntryToken
    t8: i64,ch = CopyFromReg t0, Register:i64 %vreg2
        t2: i64,ch = CopyFromReg t0, Register:i64 %vreg0
      t6: ch = CopyToReg t0, Register:i64 %vreg2, t2
      t4: i64,ch = CopyFromReg t0, Register:i64 %vreg1
    t13: Untyped,ch = SystemZISD::ATOMIC_LOAD_128<Volatile LD16[%src]> t6, t4
          t15: i64 = EXTRACT_SUBREG t13, TargetConstant:i32<2>
        t19: ch = store<ST8[<unknown>]> t13:1, t15, t8, undef:i64
          t17: i64 = EXTRACT_SUBREG t13, TargetConstant:i32<7>
          t21: i64 = add t8, Constant:i64<8>
        t22: ch = store<ST8[<unknown>]> t13:1, t17, t21, undef:i64
      t23: ch = TokenFactor t19, t22
    t12: ch = SystemZISD::RET_FLAG t23

It looks to me that SystemZ does not have i128 as a legal type, and therefore the 128 bit store gets expanded. If the coalescing is then turned off, one of the subregs will need an extra COPY as the GR128 reg is live past the first store.

Maybe this would be a good time to try and make i128 legal as we have discussed earlier?

1. untyped -> i128
2. Add pseudos that expands after register allocation, so that the coalescing problems we see here go away.
3. Make sure that all the i128 operations that actually does not have support still gets expanded per current behavior.

anything else? Any hacks relating to untyped that we know should go away then?


https://reviews.llvm.org/D37899





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