[llvm] r313968 - [mips] clang-format MipsTargetMachine.cpp

Alexander Richardson via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 22 01:52:03 PDT 2017


Author: arichardson
Date: Fri Sep 22 01:52:03 2017
New Revision: 313968

URL: http://llvm.org/viewvc/llvm-project?rev=313968&view=rev
Log:
[mips] clang-format MipsTargetMachine.cpp

This is my test commit as it only changes two lines

Modified:
    llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=313968&r1=313967&r2=313968&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Fri Sep 22 01:52:03 2017
@@ -191,8 +191,8 @@ MipsTargetMachine::getSubtargetImpl(cons
     // creation will depend on the TM and the code generation flags on the
     // function that reside in TargetOptions.
     resetTargetOptions(F);
-    I = llvm::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle,
-                                         *this, Options.StackAlignmentOverride);
+    I = llvm::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle, *this,
+                                         Options.StackAlignmentOverride);
   }
   return I.get();
 }
@@ -210,7 +210,7 @@ namespace {
 class MipsPassConfig : public TargetPassConfig {
 public:
   MipsPassConfig(MipsTargetMachine &TM, PassManagerBase &PM)
-    : TargetPassConfig(TM, PM) {
+      : TargetPassConfig(TM, PM) {
     // The current implementation of long branch pass requires a scratch
     // register ($at) to be available before branch instructions. Tail merging
     // can break this requirement, so disable it when long branch pass is




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