[PATCH] D38130: [mips] Fix negative constant multiplication when using int128_t

Miloš Stojanović via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 21 04:38:16 PDT 2017


mstojanovic created this revision.
Herald added a subscriber: arichardson.

This patch fixes a problem with negative constant multiplication when using int128_t. The problem occurs when getZExtValue() is called in performMULCombine(). If the requested number is 64 bit or less getZExtValue() just returns the whole value, but when the number is more than 64 bit the assert fails for every negative number, even though some could fit inside 64 bits, because it's interpreted as a positive value.


https://reviews.llvm.org/D38130

Files:
  lib/Target/Mips/MipsSEISelLowering.cpp
  test/CodeGen/Mips/mips64-int128-negative-multiply.ll


Index: test/CodeGen/Mips/mips64-int128-negative-multiply.ll
===================================================================
--- /dev/null
+++ test/CodeGen/Mips/mips64-int128-negative-multiply.ll
@@ -0,0 +1,10 @@
+; RUN: llc -mtriple=mips64-unknown-linux-gnu < %s
+; REQUIRES: asserts
+
+define void @mul_negative(i128* nocapture %in) {
+entry:
+  %0 = load i128, i128* %in, align 16
+  %sub = mul i128 %0, -65535
+  store i128 %sub, i128* %in, align 16
+  ret void
+}
Index: lib/Target/Mips/MipsSEISelLowering.cpp
===================================================================
--- lib/Target/Mips/MipsSEISelLowering.cpp
+++ lib/Target/Mips/MipsSEISelLowering.cpp
@@ -746,7 +746,7 @@
 
   if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1)))
     if (!VT.isVector())
-      return genConstMult(N->getOperand(0), C->getZExtValue(), SDLoc(N), VT,
+      return genConstMult(N->getOperand(0), C->getSExtValue(), SDLoc(N), VT,
                           TL->getScalarShiftAmountTy(DAG.getDataLayout(), VT),
                           DAG);
 


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