[PATCH] D37985: [AMDGPU] add LDS f32 intrinsics

[Tony Tye via Phabricator via llvm-commits]

t-tye added inline comments.


================
Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:300
+    [IntrArgMemOnly, NoCapture<0>]
+>;
+
----------------
Need to add the same fields as for AMDGPUAtomicIncIntrin, namely:

```
  llvm_i32_ty, // ordering
  llvm_i32_ty, // scope
  llvm_i1_ty], // isVolatile
```


================
Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:305
+    [IntrArgMemOnly, NoCapture<0>]
+>;
+
----------------
Need to add the same fields as for AMDGPUAtomicIncIntrin, namely:

```
  llvm_i32_ty, // ordering
  llvm_i32_ty, // scope
  llvm_i1_ty], // isVolatile
```


================
Comment at: lib/Target/AMDGPU/DSInstructions.td:619-628
+multiclass DSAtomicPatF32<string op> {
+  def : Pat <
+    (!cast<Intrinsic>(NAME#"_rtn_f32") (DS1Addr1Offset i32:$ptr), f32:$value),
+    (!cast<DS_1A1D_RET>(op#"_RTN_F32") $ptr, $value, (i16 0), (i1 0))
+  >;
+  def : Pat <
+    (!cast<Intrinsic>(NAME#"_f32") (DS1Addr1Offset i32:$ptr), f32:$value),
----------------
Also, somehow a MachineMemoryOperand needs to be created with values from the ordering, scope and isVolatile LLVM IR instruction operands.


https://reviews.llvm.org/D37985