[PATCH] D38014: [AMDGPU] Prevent post-RA scheduler from breaking memory clauses

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec created this revision.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, kzhuravl, arsenm.

The pre-RA scheduler does load/store clustering, but post-RA
scheduler undoes it. Add mutation to prevent it.


https://reviews.llvm.org/D38014

Files:
  lib/Target/AMDGPU/AMDGPUSubtarget.cpp
  lib/Target/AMDGPU/AMDGPUSubtarget.h
  test/CodeGen/AMDGPU/and.ll
  test/CodeGen/AMDGPU/ashr.v2i16.ll
  test/CodeGen/AMDGPU/br_cc.f16.ll
  test/CodeGen/AMDGPU/call-argument-types.ll
  test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
  test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir
  test/CodeGen/AMDGPU/fcopysign.f16.ll
  test/CodeGen/AMDGPU/fcopysign.f64.ll
  test/CodeGen/AMDGPU/frame-index-amdgiz.ll
  test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
  test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
  test/CodeGen/AMDGPU/load-global-i32.ll
  test/CodeGen/AMDGPU/load-weird-sizes.ll
  test/CodeGen/AMDGPU/lshr.v2i16.ll
  test/CodeGen/AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll
  test/CodeGen/AMDGPU/salu-to-valu.ll
  test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll
  test/CodeGen/AMDGPU/select-vectors.ll
  test/CodeGen/AMDGPU/select.f16.ll
  test/CodeGen/AMDGPU/shl.v2i16.ll
  test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
  test/CodeGen/AMDGPU/v_cndmask.ll
  test/CodeGen/AMDGPU/wqm.ll

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