[PATCH] D31951: TableGen support for parameterized register class information

[Reid Kleckner via Phabricator via llvm-commits]

rnk added a comment.

In https://reviews.llvm.org/D31951#873893, @zturner wrote:

> Please see https://bugs.llvm.org/show_bug.cgi?id=28222#c20 for a discussion of the performance implications of this patch.  TL;DR - This has introduced a severe performance regression in tblgen (on the order of 4x slowdown) even for architectures such as X86 which according to the patch description should not be affected by this change.
>
> Unless some algorithmic fix can be found relatively quickly, I'd like to open the possibility of reverting this patch until it can be re-worked to have more desirable performance characteristics, or at the very least be limited only to specific architectures.


+1, a 4x runtime regression in tablegen isn't acceptable, and is something that definitely should've been caught before hand.


Repository:
  rL LLVM

https://reviews.llvm.org/D31951