[PATCH] D29933: [RISCV 11/n] Initial codegen support for ALU operations

Alex Bradbury via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Sep 17 08:46:02 PDT 2017


asb added inline comments.


================
Comment at: lib/Target/RISCV/RISCVCallingConv.td:15
+// RISCV 32-bit C return-value convention.
+def RetCC_RISCV32 : CallingConv<[CCIfType<[i32], CCAssignToReg<[X10_32, X11_32]>>]>;
+
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psnobl wrote:
> Shouldn't there also be promotion of i8/i16 values to i32 (similar to the argument passing below)?
Seems to be unnecessary (later patches have tests covering returns of value types < i32, and the full gcc torture suite passes at all optimisation levels with my full patchset)., I try not to add extra code unless I can demonstrate its effect with a test.


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Comment at: lib/Target/RISCV/RISCVISelLowering.cpp:61
+  MaxStoresPerMemcpy = MaxStoresPerMemcpyOptSize = 128;
+  MaxStoresPerMemmove = MaxStoresPerMemmoveOptSize = 128;
+}
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psnobl wrote:
> Is there a special reason why the value is the same for both cases? I would expect to see much lower numbers for when we optimize for size - 16 for example.
Good catch, I've removed these. They were left over from when I was exploring a runtime failure.


https://reviews.llvm.org/D29933





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