[llvm] r313295 - Subtarget support for parameterized register class information
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 14 13:44:20 PDT 2017
Author: kparzysz
Date: Thu Sep 14 13:44:20 2017
New Revision: 313295
URL: http://llvm.org/viewvc/llvm-project?rev=313295&view=rev
Log:
Subtarget support for parameterized register class information
Implement "checkFeatures" and emitting HW mode check code.
Differential Revision: https://reviews.llvm.org/D31959
Modified:
llvm/trunk/include/llvm/MC/MCSubtargetInfo.h
llvm/trunk/include/llvm/MC/SubtargetFeature.h
llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h
llvm/trunk/lib/MC/MCSubtargetInfo.cpp
llvm/trunk/utils/TableGen/SubtargetEmitter.cpp
Modified: llvm/trunk/include/llvm/MC/MCSubtargetInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSubtargetInfo.h?rev=313295&r1=313294&r2=313295&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCSubtargetInfo.h (original)
+++ llvm/trunk/include/llvm/MC/MCSubtargetInfo.h Thu Sep 14 13:44:20 2017
@@ -118,6 +118,10 @@ public:
/// all feature bits implied by the flag.
FeatureBitset ApplyFeatureFlag(StringRef FS);
+ /// Check whether the subtarget features are enabled/disabled as per
+ /// the provided string, ignoring all other features.
+ bool checkFeatures(StringRef FS) const;
+
/// getSchedModelForCPU - Get the machine model of a CPU.
///
const MCSchedModel &getSchedModelForCPU(StringRef CPU) const;
Modified: llvm/trunk/include/llvm/MC/SubtargetFeature.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/SubtargetFeature.h?rev=313295&r1=313294&r2=313295&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/SubtargetFeature.h (original)
+++ llvm/trunk/include/llvm/MC/SubtargetFeature.h Thu Sep 14 13:44:20 2017
@@ -115,6 +115,9 @@ public:
ArrayRef<SubtargetFeatureKV> CPUTable,
ArrayRef<SubtargetFeatureKV> FeatureTable);
+ /// Returns the vector of individual subtarget features.
+ const std::vector<std::string> &getFeatures() const { return Features; }
+
/// Prints feature string.
void print(raw_ostream &OS) const;
Modified: llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h?rev=313295&r1=313294&r2=313295&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h Thu Sep 14 13:44:20 2017
@@ -110,6 +110,8 @@ public:
return nullptr;
}
+ virtual unsigned getHwMode() const { return 0; }
+
/// Target can subclass this hook to select a different DAG scheduler.
virtual RegisterScheduler::FunctionPassCtor
getDAGScheduler(CodeGenOpt::Level) const {
Modified: llvm/trunk/lib/MC/MCSubtargetInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCSubtargetInfo.cpp?rev=313295&r1=313294&r2=313295&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCSubtargetInfo.cpp (original)
+++ llvm/trunk/lib/MC/MCSubtargetInfo.cpp Thu Sep 14 13:44:20 2017
@@ -75,6 +75,18 @@ FeatureBitset MCSubtargetInfo::ApplyFeat
return FeatureBits;
}
+bool MCSubtargetInfo::checkFeatures(StringRef FS) const {
+ SubtargetFeatures T(FS);
+ FeatureBitset Set, All;
+ for (std::string F : T.getFeatures()) {
+ SubtargetFeatures::ApplyFeatureFlag(Set, F, ProcFeatures);
+ if (F[0] == '-')
+ F[0] = '+';
+ SubtargetFeatures::ApplyFeatureFlag(All, F, ProcFeatures);
+ }
+ return (FeatureBits & All) == Set;
+}
+
const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
assert(ProcSchedModels && "Processor machine model not available!");
Modified: llvm/trunk/utils/TableGen/SubtargetEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/SubtargetEmitter.cpp?rev=313295&r1=313294&r2=313295&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/SubtargetEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/SubtargetEmitter.cpp Thu Sep 14 13:44:20 2017
@@ -68,6 +68,7 @@ class SubtargetEmitter {
}
};
+ const CodeGenTarget &TGT;
RecordKeeper &Records;
CodeGenSchedModels &SchedModels;
std::string Target;
@@ -106,12 +107,14 @@ class SubtargetEmitter {
void EmitProcessorLookup(raw_ostream &OS);
void EmitSchedModelHelpers(const std::string &ClassName, raw_ostream &OS);
void EmitSchedModel(raw_ostream &OS);
+ void EmitHwModeCheck(const std::string &ClassName, raw_ostream &OS);
void ParseFeaturesFunction(raw_ostream &OS, unsigned NumFeatures,
unsigned NumProcs);
public:
- SubtargetEmitter(RecordKeeper &R, CodeGenTarget &TGT):
- Records(R), SchedModels(TGT.getSchedModels()), Target(TGT.getName()) {}
+ SubtargetEmitter(RecordKeeper &R, CodeGenTarget &TGT)
+ : TGT(TGT), Records(R), SchedModels(TGT.getSchedModels()),
+ Target(TGT.getName()) {}
void run(raw_ostream &o);
};
@@ -1329,6 +1332,22 @@ void SubtargetEmitter::EmitSchedModelHel
<< "} // " << ClassName << "::resolveSchedClass\n";
}
+void SubtargetEmitter::EmitHwModeCheck(const std::string &ClassName,
+ raw_ostream &OS) {
+ const CodeGenHwModes &CGH = TGT.getHwModes();
+ assert(CGH.getNumModeIds() > 0);
+ if (CGH.getNumModeIds() == 1)
+ return;
+
+ OS << "unsigned " << ClassName << "::getHwMode() const {\n";
+ for (unsigned M = 1, NumModes = CGH.getNumModeIds(); M != NumModes; ++M) {
+ const HwMode &HM = CGH.getMode(M);
+ OS << " if (checkFeatures(\"" << HM.Features
+ << "\")) return " << M << ";\n";
+ }
+ OS << " return 0;\n}\n";
+}
+
//
// ParseFeaturesFunction - Produces a subtarget specific function for parsing
// the subtarget features string.
@@ -1462,9 +1481,11 @@ void SubtargetEmitter::run(raw_ostream &
<< " const MachineInstr *DefMI,"
<< " const TargetSchedModel *SchedModel) const override;\n"
<< " DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID)"
- << " const;\n"
- << "};\n";
- OS << "} // end namespace llvm\n\n";
+ << " const;\n";
+ if (TGT.getHwModes().getNumModeIds() > 1)
+ OS << " unsigned getHwMode() const override;\n";
+ OS << "};\n"
+ << "} // end namespace llvm\n\n";
OS << "#endif // GET_SUBTARGETINFO_HEADER\n\n";
@@ -1515,6 +1536,7 @@ void SubtargetEmitter::run(raw_ostream &
OS << ") {}\n\n";
EmitSchedModelHelpers(ClassName, OS);
+ EmitHwModeCheck(ClassName, OS);
OS << "} // end namespace llvm\n\n";
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