[llvm] r312867 - [X86][MOVBE] Fix typo in MOVBE scheduling test names
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 9 10:52:44 PDT 2017
Author: rksimon
Date: Sat Sep 9 10:52:44 2017
New Revision: 312867
URL: http://llvm.org/viewvc/llvm-project?rev=312867&view=rev
Log:
[X86][MOVBE] Fix typo in MOVBE scheduling test names
Copy+paste is not your friend
Modified:
llvm/trunk/test/CodeGen/X86/movbe-schedule.ll
Modified: llvm/trunk/test/CodeGen/X86/movbe-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/movbe-schedule.ll?rev=312867&r1=312866&r2=312867&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/movbe-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/movbe-schedule.ll Sat Sep 9 10:52:44 2017
@@ -8,14 +8,14 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1
-define i16 @test_ctlz_i16(i16 *%a0, i16 %a1, i16 *%a2) {
-; GENERIC-LABEL: test_ctlz_i16:
+define i16 @test_movbe_i16(i16 *%a0, i16 %a1, i16 *%a2) {
+; GENERIC-LABEL: test_movbe_i16:
; GENERIC: # BB#0:
; GENERIC-NEXT: movbew (%rdi), %ax # sched: [5:0.50]
; GENERIC-NEXT: movbew %si, (%rdx) # sched: [1:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
-; ATOM-LABEL: test_ctlz_i16:
+; ATOM-LABEL: test_movbe_i16:
; ATOM: # BB#0:
; ATOM-NEXT: movbew (%rdi), %ax # sched: [1:1.00]
; ATOM-NEXT: movbew %si, (%rdx) # sched: [1:1.00]
@@ -25,25 +25,25 @@ define i16 @test_ctlz_i16(i16 *%a0, i16
; ATOM-NEXT: nop # sched: [1:0.50]
; ATOM-NEXT: retq # sched: [79:39.50]
;
-; SLM-LABEL: test_ctlz_i16:
+; SLM-LABEL: test_movbe_i16:
; SLM: # BB#0:
; SLM-NEXT: movbew (%rdi), %ax # sched: [4:1.00]
; SLM-NEXT: movbew %si, (%rdx) # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
-; HASWELL-LABEL: test_ctlz_i16:
+; HASWELL-LABEL: test_movbe_i16:
; HASWELL: # BB#0:
; HASWELL-NEXT: movbew (%rdi), %ax # sched: [1:0.50]
; HASWELL-NEXT: movbew %si, (%rdx) # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
-; BTVER2-LABEL: test_ctlz_i16:
+; BTVER2-LABEL: test_movbe_i16:
; BTVER2: # BB#0:
; BTVER2-NEXT: movbew (%rdi), %ax # sched: [4:1.00]
; BTVER2-NEXT: movbew %si, (%rdx) # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
-; ZNVER1-LABEL: test_ctlz_i16:
+; ZNVER1-LABEL: test_movbe_i16:
; ZNVER1: # BB#0:
; ZNVER1-NEXT: movbew (%rdi), %ax # sched: [5:0.50]
; ZNVER1-NEXT: movbew %si, (%rdx) # sched: [5:0.50]
@@ -56,14 +56,14 @@ define i16 @test_ctlz_i16(i16 *%a0, i16
}
declare i16 @llvm.bswap.i16(i16)
-define i32 @test_ctlz_i32(i32 *%a0, i32 %a1, i32 *%a2) {
-; GENERIC-LABEL: test_ctlz_i32:
+define i32 @test_movbe_i32(i32 *%a0, i32 %a1, i32 *%a2) {
+; GENERIC-LABEL: test_movbe_i32:
; GENERIC: # BB#0:
; GENERIC-NEXT: movbel (%rdi), %eax # sched: [5:0.50]
; GENERIC-NEXT: movbel %esi, (%rdx) # sched: [1:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
-; ATOM-LABEL: test_ctlz_i32:
+; ATOM-LABEL: test_movbe_i32:
; ATOM: # BB#0:
; ATOM-NEXT: movbel (%rdi), %eax # sched: [1:1.00]
; ATOM-NEXT: movbel %esi, (%rdx) # sched: [1:1.00]
@@ -73,25 +73,25 @@ define i32 @test_ctlz_i32(i32 *%a0, i32
; ATOM-NEXT: nop # sched: [1:0.50]
; ATOM-NEXT: retq # sched: [79:39.50]
;
-; SLM-LABEL: test_ctlz_i32:
+; SLM-LABEL: test_movbe_i32:
; SLM: # BB#0:
; SLM-NEXT: movbel (%rdi), %eax # sched: [4:1.00]
; SLM-NEXT: movbel %esi, (%rdx) # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
-; HASWELL-LABEL: test_ctlz_i32:
+; HASWELL-LABEL: test_movbe_i32:
; HASWELL: # BB#0:
; HASWELL-NEXT: movbel (%rdi), %eax # sched: [1:0.50]
; HASWELL-NEXT: movbel %esi, (%rdx) # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
-; BTVER2-LABEL: test_ctlz_i32:
+; BTVER2-LABEL: test_movbe_i32:
; BTVER2: # BB#0:
; BTVER2-NEXT: movbel (%rdi), %eax # sched: [4:1.00]
; BTVER2-NEXT: movbel %esi, (%rdx) # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
-; ZNVER1-LABEL: test_ctlz_i32:
+; ZNVER1-LABEL: test_movbe_i32:
; ZNVER1: # BB#0:
; ZNVER1-NEXT: movbel (%rdi), %eax # sched: [5:0.50]
; ZNVER1-NEXT: movbel %esi, (%rdx) # sched: [5:0.50]
@@ -104,14 +104,14 @@ define i32 @test_ctlz_i32(i32 *%a0, i32
}
declare i32 @llvm.bswap.i32(i32)
-define i64 @test_ctlz_i64(i64 *%a0, i64 %a1, i64 *%a2) {
-; GENERIC-LABEL: test_ctlz_i64:
+define i64 @test_movbe_i64(i64 *%a0, i64 %a1, i64 *%a2) {
+; GENERIC-LABEL: test_movbe_i64:
; GENERIC: # BB#0:
; GENERIC-NEXT: movbeq (%rdi), %rax # sched: [5:0.50]
; GENERIC-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
-; ATOM-LABEL: test_ctlz_i64:
+; ATOM-LABEL: test_movbe_i64:
; ATOM: # BB#0:
; ATOM-NEXT: movbeq (%rdi), %rax # sched: [1:1.00]
; ATOM-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00]
@@ -121,25 +121,25 @@ define i64 @test_ctlz_i64(i64 *%a0, i64
; ATOM-NEXT: nop # sched: [1:0.50]
; ATOM-NEXT: retq # sched: [79:39.50]
;
-; SLM-LABEL: test_ctlz_i64:
+; SLM-LABEL: test_movbe_i64:
; SLM: # BB#0:
; SLM-NEXT: movbeq (%rdi), %rax # sched: [4:1.00]
; SLM-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
-; HASWELL-LABEL: test_ctlz_i64:
+; HASWELL-LABEL: test_movbe_i64:
; HASWELL: # BB#0:
; HASWELL-NEXT: movbeq (%rdi), %rax # sched: [1:0.50]
; HASWELL-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
-; BTVER2-LABEL: test_ctlz_i64:
+; BTVER2-LABEL: test_movbe_i64:
; BTVER2: # BB#0:
; BTVER2-NEXT: movbeq (%rdi), %rax # sched: [4:1.00]
; BTVER2-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
-; ZNVER1-LABEL: test_ctlz_i64:
+; ZNVER1-LABEL: test_movbe_i64:
; ZNVER1: # BB#0:
; ZNVER1-NEXT: movbeq (%rdi), %rax # sched: [5:0.50]
; ZNVER1-NEXT: movbeq %rsi, (%rdx) # sched: [5:0.50]
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