[PATCH] D31951: TableGen support for parametrized register class information
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 7 13:10:36 PDT 2017
asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.
I'm adding my accept to this. I carefully reviewed the details of the code once it was first posted (see earlier comments), and believe this is a valuable improvement. There are others on the review list with more TableGen who may be better placed to comment on the high level design decisions. If somebody else with more TableGen insight (e.g. @sdardis, @matzeB) can add their LGTM I think this is ready to go on.
It's worth also noting that this change has had a public RFC back in September http://lists.llvm.org/pipermail/llvm-dev/2016-September/105027.html
Repository:
rL LLVM
https://reviews.llvm.org/D31951
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